CSM9S12XDT512SLK Freescale Semiconductor, CSM9S12XDT512SLK Datasheet - Page 651

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CSM9S12XDT512SLK

Manufacturer Part Number
CSM9S12XDT512SLK
Description
KIT STUDENT LEARNING 16BIT
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of CSM9S12XDT512SLK

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Chapter 18
Memory Mapping Control (S12XMMCV3)
18.1
Introduction
This section describes the functionality of the module mapping control (MMC) sub-block of the S12X
platform. The block diagram of the MMC is shown in
Figure
18-1.
The MMC module controls the multi-master priority accesses, the selection of internal resources and
external space. Internal buses, including internal memories and peripherals, are controlled in this module.
The local address space for each master is translated to a global memory space.
MC9S12XDP512 Data Sheet, Rev. 2.21
Freescale Semiconductor
651

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