AT86RF212-ZU Atmel, AT86RF212-ZU Datasheet - Page 147

IC TXRX ZIGBE/802.15.4/ISM 32QFN

AT86RF212-ZU

Manufacturer Part Number
AT86RF212-ZU
Description
IC TXRX ZIGBE/802.15.4/ISM 32QFN
Manufacturer
Atmel
Datasheet

Specifications of AT86RF212-ZU

Frequency
700MHz, 800MHz, 900MHz
Data Rate - Maximum
250kbps
Modulation Or Protocol
802.15.4 Zigbee, 6LoWPAN, ISM
Applications
ISM, ZigBee™
Power - Output
10dBm
Sensitivity
-110dBm
Voltage - Supply
1.8 V ~ 3.6 V
Current - Receiving
9.2mA
Current - Transmitting
25mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
Number Of Receivers
1
Number Of Transmitters
1
Wireless Frequency
769 MHz to 935 MHz
Interface Type
SPI
Noise Figure
7 dB
Output Power
21 dB
Operating Supply Voltage
1.8 V, 3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Maximum Supply Current
25 mA
Minimum Operating Temperature
- 40 C
Modulation
OQPSK
Protocol Supported
802.15.4
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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9.7 Dynamic Frame Buffer Protection
9.7.1 Overview
8168C-MCU Wireless-02/10
Table 9-17. Register 0x04 (TRX_CTRL_1)
• Bit 7 – PA_EXT_EN
Refer to section 9.4.3.
• Bit 6 – IRQ_2_EXT_EN
Refer to section 9.5.2.
• Bit 5 – TX_AUTO_CRC_ON
Refer to section 6.3.5.
• Bit 4 – RX_BL_CTRL
If this register bit is set, the Frame Buffer Empty Indicator is enabled. After sending a
Frame Buffer read command (refer to section 4.3), pin 24 (IRQ) indicates that an
access to the Frame Buffer is not possible since PSDU data are not available yet. Pin
24 (IRQ) does not indicate any interrupt during this time.
Table 9-18. Frame Buffer Empty Indicator
• Bit 3:2 – SPI_CMD_MODE
Refer to section 4.4.1.
• Bit 1:0
Refer to section 4.7.2.
The AT86RF212 continues the reception of incoming frames as long as it is in any
receive state. When a frame is successfully received and stored in the Frame Buffer,
the following frame overwrites the Frame Buffer content again.
To relax the timing requirements of a Frame Buffer read access, Dynamic Frame Buffer
Protection prevents that a new incoming frame overwrites the Frame Buffer as long as
the Frame Buffer read access has not been completed by /SEL = H, refer to section 4.3.
A received frame is automatically protected against overwriting
• in Basic Operating Mode if its FCS is valid
• in Extended Operating Mode if an IRQ_3 (TRX_END) is generated
Bit
Name
Read/Write
Reset Value
Bit
Name
Read/Write
Reset Value
Register Bit
RX_BL_CTRL
7
PA_EXT_EN
R/W
0
3
SPI_CMD_MODE
R/W
0
Value
0
1
6
IRQ_2_EXT_EN
R/W
0
2
SPI_CMD_MODE
R/W
0
Description
Frame Buffer Empty Indicator disabled
Frame Buffer Empty Indicator enabled
5
TX_AUTO_CRC_ON
R/W
1
1
IRQ_MASK_MODE
R/W
0
AT86RF212
4
RX_BL_CTRL
R/W
0
0
IRQ_POLARITY
R/W
0
147

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