MC33696FCAE Freescale Semiconductor, MC33696FCAE Datasheet - Page 11
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MC33696FCAE
Manufacturer Part Number
MC33696FCAE
Description
IC UHF RECEIVER PLL TUNED 32-QFN
Manufacturer
Freescale Semiconductor
Type
Transceiverr
Datasheet
1.MC33696FCAE.pdf
(80 pages)
Specifications of MC33696FCAE
Frequency
304, 315, 426, 434, 868 & 915MHz
Data Rate - Maximum
20kbps
Modulation Or Protocol
FSK, OOK
Applications
General Data Transfer
Power - Output
7.5dBm
Sensitivity
-106dBm
Voltage - Supply
2.7 V ~ 3.3 V, 4.5 V ~ 5.5 V
Current - Receiving
10.3mA
Current - Transmitting
13mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
32-QFN
Operating Frequency
915 MHz
Operating Supply Voltage
2.5 V or 3.3 V or 5 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 20 C
Mounting Style
SMD/SMT
Operating Temperature (min)
-20C
Operating Temperature (max)
85C
Operating Temperature Classification
Commercial
Modulation Type
FSK/OOK
Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Refer to
be complied with in order to change between two selected modes.
The data transfer protocol for each mode is described in the following section.
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This section describes how the MC33696 controller executes sequences of operations, relative to the
selected mode. The controller is a finite state machine, clocked at T
Figure 2
There are four different modes: configuration, transmit, receive, and standby/LVD. Each mode is exclusive
and can be entered in different ways, as follows.
After a Power-on Reset (POR), the circuit is in standby mode (see
contents are set to the reset value.
At any time, a low level applied to CONFB forces the finite state machine into configuration mode,
whatever the current state. This is not always shown in state diagrams, but must always be considered.
Refer to
and configuration mode.
Freescale Semiconductor
•
•
•
External signal: CONFB for configuration mode
External signal and configuration bits: CONFB, STROBE, TRXE, and/or MODE for all other
modes
External signal and internal conditions: see
enter standby/LVD mode
(Section 16, “Power-On Reset and MC33696
Section 11, “State
(note that some branches refer to other diagrams that provide more detailed information).
State Machine
Machine,” and to
MC33696 Data Sheet, Rev. 12
Figure 2
Figure 3
Startup”) for timing sequence between standy mode
for more details about all the conditions that must
and
Figure 12
Figure
digclk
. An overview is presented in
2) and the configuration register
for information on how to
State Machine
11