MC33696FCAE Freescale Semiconductor, MC33696FCAE Datasheet - Page 15

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MC33696FCAE

Manufacturer Part Number
MC33696FCAE
Description
IC UHF RECEIVER PLL TUNED 32-QFN
Manufacturer
Freescale Semiconductor
Type
Transceiverr
Datasheet

Specifications of MC33696FCAE

Frequency
304, 315, 426, 434, 868 & 915MHz
Data Rate - Maximum
20kbps
Modulation Or Protocol
FSK, OOK
Applications
General Data Transfer
Power - Output
7.5dBm
Sensitivity
-106dBm
Voltage - Supply
2.7 V ~ 3.3 V, 4.5 V ~ 5.5 V
Current - Receiving
10.3mA
Current - Transmitting
13mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
32-QFN
Operating Frequency
915 MHz
Operating Supply Voltage
2.5 V or 3.3 V or 5 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 20 C
Mounting Style
SMD/SMT
Operating Temperature (min)
-20C
Operating Temperature (max)
85C
Operating Temperature Classification
Commercial
Modulation Type
FSK/OOK
Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
12.2.1 Data Manager Functions
In receive mode, Manchester coded data can be processed internally by the data manager. After decoding,
the data is available on the digital interface, in SPI format. This minimizes the load on the MCU.
The data manager, when enabled (DME = 1), has five purposes:
Table 6
12.2.2 Manchester Coding Description
The MC33696 data manager is able to decode Manchester-coded messages. For other codings, the data
manager should be disabled (DME=0) for raw data to be available on MOSI.
Freescale Semiconductor
First ID detection: the received data are compared with the identifier stored in the ID register.
Then the HEADER recognition: the received data is compared with the data stored in the
HEADER register.
Clock recovery: the clock is recovered during reception of the preamble and is computed from the
shortest received pulse. While this signal is being received, the recovered clock is constantly
updated to the data rate of the incoming signal.
Output data and recovered clock on digital interface: see
End-of-message detection: an EOM consists of two consecutive NRZ ones or zeroes.
details some MC33696 features versus DME values.
(Section 10)
(Section 10)
*Refer to
*Refer to
STROBE
STROBE
CONFB
CONFB
(Output)
(Output)
(Output)
(Output)
SCLK
SCLK
MOSI
MOSI
SEB
SEB
Figure 5. Typical Transfer in Receive mode with Data Manager
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
DME
0
1
D 7
D 7
SPI deselected, received data
D6 D 5 D4 D3 D2 D1
D6 D 5 D4 D3 D2 D1
MOSI with clock on SCLK
are directly sent to MOSI
SPI master, data sent on
Table 6.
Digital Interface Use
when CONFB = 1
when CONFB = 1
the
MC33696 Data Sheet, Rev. 12
Recovered Clock Updated to I ncoming Signal Data Rate
Recovered Clock Updated to I ncoming Signal Data Rate
MC33696 Features versus DME
D0
D0
D7
D7
D6 D5 D4 D3 D 2 D1 D0 D7 D6 D5 D4 D3 D2 D 1 D0
D6 D5 D4 D3 D 2 D1 D0 D7 D6 D5 D4 D3 D2 D 1 D0
Recovered clock
Data Format
Data bytes
Bit stream
No clock
Figure
5.
Output
SCLK
MOSI
MOSI
Receive Mode
15

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