MC33696FCAE Freescale Semiconductor, MC33696FCAE Datasheet - Page 47
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MC33696FCAE
Manufacturer Part Number
MC33696FCAE
Description
IC UHF RECEIVER PLL TUNED 32-QFN
Manufacturer
Freescale Semiconductor
Type
Transceiverr
Datasheet
1.MC33696FCAE.pdf
(80 pages)
Specifications of MC33696FCAE
Frequency
304, 315, 426, 434, 868 & 915MHz
Data Rate - Maximum
20kbps
Modulation Or Protocol
FSK, OOK
Applications
General Data Transfer
Power - Output
7.5dBm
Sensitivity
-106dBm
Voltage - Supply
2.7 V ~ 3.3 V, 4.5 V ~ 5.5 V
Current - Receiving
10.3mA
Current - Transmitting
13mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
32-QFN
Operating Frequency
915 MHz
Operating Supply Voltage
2.5 V or 3.3 V or 5 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 20 C
Mounting Style
SMD/SMT
Operating Temperature (min)
-20C
Operating Temperature (max)
85C
Operating Temperature Classification
Commercial
Modulation Type
FSK/OOK
Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
00h CONFIG1-A
Bit Name
Reset
Value
0 =
1 =
01h CONFIG2-A
Bit Name
Reset
Value
0 =
1 =
02h CONFIG3-A
Bit Name
Reset
Value
0 =
1 =
03h COMMAND-A
Bit Name
Reset
Value
0 =
1 =
04h F1-A
Bit Name
Reset
Value
05h F2-A
Bit Name
Reset
Value
Bit 7
LOF1
1
R/W
304–434
315–916
Bit 7
DSREF
0
R/W
Fixed
Adaptive
Bit 7
AFF1
0
R/W
0.5–1
kHz
2–4 kHz
Bit 7
AFFC
0
R/W
AFFx
OFF
AFFx ON –20 dB
Bit 7
FSK3
0
R/W
Bit 7
F7
0
R/W
91 h
Bit 6
LOF0
0
R/W
304–315
434–916
10 h
Bit 6
FRM
0
R/W
Friendly
Direct
30 h
Bit 6
AFF0
0
R/W
0.5–2
kHz
1–4 kHz
9 h
Bit 6
IFLA
0
R/W
No
48 h
Bit 6
FSK2
1
R/W
0 h
Bit 6
F6
0
R/W
Bit 5
CF1
0
R/W
315–434
868
Bit 5
MODU
0
R/W
OOK
FSK
Bit 5
OLS
1
R
RAS
Unlocked Low V
Bit 5
MODE
0
R/W
RX
TX
Bit 5
FSK1
0
R/W
Bit 5
F5
0
R/W
Bank A Registers
Bit 4
CF0
1
R/W
314
434–868
Bit 4
DR1
1
R/W
2.4–4.8
9.6–19.2
Bit 4
LVDS
1
RR
RAS
Bit 4
RSSIE
0
R/W
No
Yes
Bit 4
FSK0
0
R/W
Bit 4
F4
0
R/W
Bit 3
RESET
0
R/W
No
Yes
Bit 3
DR0
0
R/W
2.4–9.6
4.8–19.2
Bit 3
ILA1
0
R/W
0–8 dB
14–24 dB 8–24 dB
Bit 3
EDD
1
R/W
Slow dec. No
Fast dec. Yes
Bit 3
F11
1
R/W
Bit 3
F3
0
R/W
Bit 2
SL
0
R/W
T/R
R/T
Bit 2
TRXE
0
R/W
Standby
Enable
Bit 2
ILA0
0
R/W
0–14 dB
Bit 2
RAGC
0
R/W
Bit 2
F10
0
R/W
Bit 2
F1
0
R/W
No
FAGC
F9
Bit 1
LVDE
0
R/W
Yes
Bit 1
DME
0
R/W
No
Yes
Bit 1
OLA1
0
R/W
0–8 dB
14–24 dB 8–24 dB
Bit 1
0
R/W
No
Yes
Bit 1
0
R/W
Bit 1
F1
0
R/W
Figure 35. Bank Registers
Bit 0
CLKE
1
R/W
No
Yes
Bit 0
SOE
0
R/W
No
Yes
Bit 0
OLA0
0
R/W
0–14 dB
Bit 0
BANKS
1
R
B Bank
A Bank
Bit 0
F8
0
R/W
Bit 0
F0
0
R/W
0Dh CONFIG1-B
Bit Name
Reset
Value
0 =
1 =
0Eh CONFIG2-B
Bit Name
Reset
Value
0 =
1 =
0Fh CONFIG3-B
Bit Name
Reset
Value
0 =
1 =
10h COMMAND-B
Bit Name
Reset
Value
0 =
1 =
11h F1-B
Bit Name
Reset
Value
12h F2-B
Bit Name
Reset
Value
Bit 7
LOF1
1
R/W
304–434
315–916
Bit 7
DSREF
0
R/W
Fixed
Adaptive
Bit 7
AFF1
0
R/W
0.5–1
kHz
2–4 kHz
Bit 7
AFFC
0
R/W
AFFx
OFF
AFFx ON –20 dB
Bit 7
FSK3
0
R/W
Bit 7
F7
0
R/W
91 h
Bit 6
LOF0
0
R/W
304–315
434–916
10 h
Bit 6
FRM
0
R/W
Friendly
Direct
30 h
Bit 6
AFF0
0
R/W
0.5–2
kHz
1–4 kHz
9 h
Bit 6
IFLA
0
R/W
No
4800 h
Bit 6
FSK2
1
R/W
0 h
Bit 6
F6
0
R/W
Bit 5
CF1
0
R/W
315–434
868
Bit 5
MODU
0
R/W
OOK
FSK
Bit 5
OLS
1
R[A]
RAS
Unlocked Low V
Bit 5
MODE
0
R/W
RX
TX
Bit 5
FSK1
0
R/W
Bit 5
F5
0
R/W
Bank B Registers
Bit 4
CF0
1
R/W
314
434–868
Bit 4
DR1
1
R/W
2.4–4.8
9.6–19.2
Bit 4
LVDS
1
RR[A]
RAS
Bit 4
RSSIE
0
R/W
No
Yes
Bit 4
FSK0
0
R/W
Bit 4
F4
0
R/W
Bit 3
—
—
—
Bit 3
DR0
Bit 3
ILA1
0–8 dB
F11
Bit 3
F3
0
R
0
R/W
2.4–9.6
4.8–19.2
0
R/W
14–24 dB 8–24 dB
Bit 3
EDD
1
R/W
Slow dec. No
Fast dec. Yes
Bit 3
1
R/W
0
R/W
Bit 2
SL
0
R/W
T/R
R/T
Bit 2
TRXE
0
R/W
Standby
Enable
Bit 2
ILA0
0
R/W
0–14 dB
Bit 2
RAGC
0
R/W
Bit 2
F10
0
R/W
Bit 2
F1
0
R/W
Bit 1
LVDE
0
R/W
No
Yes
Bit 1
DME
0
R/W
No
Yes
Bit 1
OLA1
0
R/W
0–8 dB
14–24 dB 8–24 dB
Bit 1
FAGC
0
R/W
No
Yes
Bit 1
F9
0
R/W
Bit 1
F1
0
R/W
Bit 0
CLKE
1
No
Yes
Bit 0
SOE
0
No
Bit 0
OLA0—
0
0–14 dB
Bit 0
BANKS
1
B Bank
Bit 0
F8
0
Bit 0
F0
0
R/W
R[A]
Yes
R/W
R[A]
A Bank
R/W
R/W