AT86RF231-ZFR Atmel, AT86RF231-ZFR Datasheet - Page 7
AT86RF231-ZFR
Manufacturer Part Number
AT86RF231-ZFR
Description
TXRX LOW POWER 2.4GHZ 32VQFN
Manufacturer
Atmel
Datasheet
1.AT86RF231-ZUR.pdf
(198 pages)
Specifications of AT86RF231-ZFR
Frequency
2.4GHz
Data Rate - Maximum
2Mbps
Modulation Or Protocol
802.15.4 Zigbee, 6LoWPAN, RF4CE, SP100, WirelessHART™, ISM
Applications
Industrial Monitoring and Control, Wireless Alarm and Security Systems
Power - Output
-17dBm ~ 3dBm
Sensitivity
-101dBm
Voltage - Supply
1.8 V ~ 3.6 V
Current - Receiving
12.3mA
Current - Transmitting
14mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
Number Of Receivers
1
Number Of Transmitters
1
Wireless Frequency
2405 MHz to 2480 MHz
Interface Type
SPI
Noise Figure
6 dB
Output Power
20 dB
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Maximum Supply Current
12.3 mA
Minimum Operating Temperature
- 40 C
Modulation
OQPSK
Protocol Supported
802.15.4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
AT86RF231-ZFR
AT86RF231-ZFRTR
AT86RF231-ZFRTR
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1.3
1.3.1
Table 1-3.
1.3.2
8111C–MCU Wireless–09/09
Pins
MISO, IRQ, DIG1,..., DIG4
CLKM
Digital Pins
Driver Strength Settings
Pull-Up and Pull-Down Configuration
Digital Output Driver Configuration
The AT86RF231 provides a digital microcontroller interface. The interface comprises a slave
SPI (/SEL, SCLK, MOSI and MISO) and additional control signals (CLKM, IRQ, SLP_TR, /RST
and DIG2). The microcontroller interface is described in detail in
Interface” on page
Additional digital output signals DIG1...DIG4 are provided to control external blocks, i.e. for
Antenna Diversity RF switch control or as an RX/TX Indicator, see
sity” on page 142
pulled-down to digital ground (DIG1/DIG2) or analog ground (DIG3/DIG4).
The driver strength of all digital output pins (MISO, IRQ, DIG1, DIG2, DIG3, DIG4) and CLKM
pin can be configured using register 0x03 (TRX_CTRL_0), see
The capacitive load should be as small as possible as, not larger than 50 pF when using the
2 mA minimum driver strength setting. Generally, the output driver strength should be adjusted
to the lowest possible value in order to keep the current consumption and the emission of digital
signal harmonics low.
All digital input pins are internally pulled-up or pulled-down in radio transceiver state P_ON, see
Section 7.1.2.1 “P_ON - Power-On after VDD” on page
pull-up and pull-down configuration.
Table 1-4.
In all other radio transceiver states, no pull-up or pull-down circuitry is connected to any of the
digital input pins mentioned in
figuration is disabled.
SLP_TR
SCLK
MOSI
/RST
/SEL
Pins
Pull-Up / Pull-Down Configuration of Digital Input Pins in P_ON State
Default Driver Strength
and
16.
Section 11.5 “RX/TX Indicator” on page
2 mA
4 mA
Table 1-4 on page
H
7. In RESET state, the pull-up / pull-down con-
=
Recommendation/Comment
Adjustable to 2 mA, 4 mA, 6 mA and 8 mA
Adjustable to 2 mA, 4 mA, 6 mA and 8 mA
ˆ
pull-up, L
34.
Table 1-4 on page 7
H
H
L
L
L
=
ˆ
Table 1-3 on page
pull-down
147. After reset, these pins are
Section 11.4 “Antenna Diver-
Section 6. “Microcontroller
AT86RF231
summarizes the
7.
7
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