AT86RF231-ZFR Atmel, AT86RF231-ZFR Datasheet - Page 74

• Manufacturer Part Number: AT86RF231-ZFR
• Description: TXRX LOW POWER 2.4GHZ 32VQFN
• Manufacturer: Atmel

Specifications of AT86RF231-ZFR

• Frequency: 2.4GHz
• Data Rate - Maximum: 2Mbps
• Modulation Or Protocol: 802.15.4 Zigbee, 6LoWPAN, RF4CE, SP100, WirelessHART™, ISM
• Applications: Industrial Monitoring and Control, Wireless Alarm and Security Systems
• Power - Output: -17dBm ~ 3dBm
• Sensitivity: -101dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 12.3mA
• Current - Transmitting: 14mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Number Of Receivers: 1
• Number Of Transmitters: 1
• Wireless Frequency: 2405 MHz to 2480 MHz
• Interface Type: SPI
• Noise Figure: 6 dB
• Output Power: 20 dB
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Maximum Supply Current: 12.3 mA
• Minimum Operating Temperature: - 40 C
• Modulation: OQPSK
• Protocol Supported: 802.15.4
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: AT86RF231-ZFR; AT86RF231-ZFRTR

8111C–MCU Wireless–09/09
Bit
+0x2E
Read/Write
Reset Value
R/W
AACK_FVN_MODE
7
0
R/W
6
1
• Bit [7:0] - CSMA_SEED_0
This register contains the lower 8-bit of the CSMA_SEED, bits [7:0]. The higher 3 bit are part of
register bits CSMA_SEED_1 (register 0x2E, CSMA_SEED_1). CSMA_SEED is the seed for the
random number generation that determines the length of the back-off period in the CSMA-CA
algorithm.
It is recommended to initialize registers CSMA_SEED by random values. This can be done
using register bits RND_VALUE (register 0x06, PHY_RSSI), refer to
Number Generator” on page
Register 0x2E (CSMA_SEED_1):
The CSMA_SEED_1 register is a control register for RX_AACK and contains a part of the
CSMA_SEED for the CSMA-CA algorithm.
Note:
• Bit [7:6] - AACK_FVN_MODE
The frame control field of the MAC header (MHR) contains a frame version subfield. The setting
of AACK_FVN_MODE specifies the frame filtering behavior of the AT86RF231. According to the
content of these register bits the radio transceiver passes frames with a specific frame version
number, number group, or independent of the frame version number.
Thus the register bit AACK_FVN_MODE defines the maximum acceptable frame version.
Received frames with a higher frame version number than configured do not pass the address
filter and are not acknowledged.
Table 7-19.
The frame version field of the acknowledgment frame is set to 0x00 according to IEEE 802.15.4-
2006, section 7.2.2.3.1, Acknowledgment frame MHR fields.
• Bit 5 - AACK_SET_PD
The content of AACK_SET_PD bit is copied into the frame pending subfield of the acknowledg-
ment frame if the ACK is the answer to a data request MAC command frame.
In addition, if register bits AACK_FVN_MODE (register 0x2E, CSMA_SEED_1) are configured
to accept frames with a frame version other than 0 or 1, the content of register bit
Register Bit
AACK_FVN_MODE
AACK_SET_PD
The register bits CSMA_SEED_0/1 content initializes the TX_ARET random backoff generator
after leaving SLEEP state. To prevent a reinitialization with the same value it is recommended to
reinitialize all register bits with random values before entering SLEEP state.
R/W
5
0
Register Bit Slotted Acknowledgement Operation
AACK_DIS_ACK
R/W
4
0
Value
136.
0
1
2
3
AACK_I_AM_COORD
State Description
Acknowledge frames with version number 0
Acknowledge frames with version number 0 or 1
Acknowledge frames with version number 0 or 1 or 2
Acknowledge independent of frame version number
R/W
3
0
R/W
2
0
CSMA_SEED_1
R/W
1
1
Section 11.2 “Random
AT86RF231
R/W
0
0
CSMA_SEED_1
74