AT86RF231-ZU Atmel, AT86RF231-ZU Datasheet - Page 21

• Manufacturer Part Number: AT86RF231-ZU
• Description: IC TXRX ZIGBE/802.15.4/ISM 32QFN
• Manufacturer: Atmel

Specifications of AT86RF231-ZU

• Frequency: 2.4GHz
• Data Rate - Maximum: 2Mbps
• Modulation Or Protocol: 802.15.4 Zigbee, 6LoWPAN, RF4CE, SP100, WirelessHART™, ISM
• Applications: Industrial Monitoring and Control, Wireless Alarm and Security Systems
• Power - Output: -17dBm ~ 3dBm
• Sensitivity: -101dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 12.3mA
• Current - Transmitting: 14mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Number Of Receivers: 1
• Number Of Transmitters: 1
• Wireless Frequency: 2405 MHz to 2480 MHz
• Interface Type: SPI
• Noise Figure: 6 dB
• Output Power: 20 dB
• Operating Supply Voltage: 2.5 V, 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Maximum Supply Current: 12.3 mA
• Minimum Operating Temperature: - 40 C
• Modulation: OQPSK
• Protocol Supported: 802.15.4
• Transmitting Current: 11.6mA
• Data Rate: 2Mbps
• Frequency Range: 2.405GHz To 2.48GHz
• Modulation Type: O-QPSK
• Sensitivity Dbm: -101dBm
• Rf Ic Case Style: QFN
• No. Of Pins: 32
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Figure 6-8.
Figure 6-9.
8111C–MCU Wireless–09/09
MOSI
MISO
/SEL
SCLK
MOSI
MISO
0
byte 1 (command byte)
1
PHY_STATUS
1
Packet Structure - Frame Write Access
Example SPI Sequence - Frame Buffer Read of a Frame with 4-byte PSDU
PHY_STATUS
reserved[4:0]
COMMAND
Note, the Frame Buffer read access can be terminated at any time without any consequences by
setting /SEL = H, e.g. after reading the PHR byte only.
On Frame Buffer write access the second byte transferred on MOSI contains the frame length
(PHR field) followed by the payload data (PSDU) as shown by
The number of bytes n for one frame access is calculated as follows:
The maximum value of frame_length is 127 bytes. That means that n ≤ 130 for Frame Buffer
read and n ≤ 129 for Frame Buffer write accesses.
Each read or write of a data byte increments automatically the address counter of the Frame
Buffer until the access is terminated by setting /SEL = H. A Frame Buffer read access may be
terminated (/SEL = H) at any time without affecting the Frame Buffer content. Another Frame
Buffer read operation starts again at the PHR field.
The content of the Frame Buffer is only overwritten by a new received frame or a Frame Buffer
write access.
Figure 6-9 on page 21
Frame Buffer access to read and write a frame with 4-byte PSDU respectively.
• Read Access:
• Write Access:
PHR
byte 2 (data byte)
XX
PHR[7:0]
XX
PSDU 1
n = 3 + frame_length
[PHY_STATUS, PHR byte, PSDU data, and LQI byte]
n = 2 + frame_length
[command byte, PHR byte, and PSDU data]
XX
and
Figure 6-10 on page 22
byte 3 (data byte)
PSDU[7:0]
XX
PSDU 2
XX
PSDU 3
XX
illustrate an example SPI sequence of a
byte n-1 (data byte)
PSDU[7:0]
XX
Figure 6-8 on page
PSDU 4
XX
AT86RF231
byte n (data byte)
PSDU[7:0]
LQI
XX
21.
XX
21