MC13212 Freescale Semiconductor, MC13212 Datasheet - Page 17
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MC13212
Manufacturer Part Number
MC13212
Description
IC TXRX RF 2.4GHZ FLSH 32K 71LGA
Manufacturer
Freescale Semiconductor
Series
MC1321xr
Datasheet
1.1321XCSK-BDM.pdf
(70 pages)
Specifications of MC13212
Frequency
2.4GHz
Data Rate - Maximum
250kbps
Modulation Or Protocol
802.15.4 Zigbee
Applications
General Purpose
Power - Output
3dBm
Sensitivity
-92dBm
Voltage - Supply
1.8 V ~ 3.6 V
Current - Receiving
42mA
Current - Transmitting
35mA
Data Interface
PCB, Surface Mount
Memory Size
32kB Flash, 2kB RAM
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
71-LGA
Mounting Style
SMD/SMT
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC13212
Manufacturer:
FREESCALE
Quantity:
20 000
Company:
Part Number:
MC13212R2
Manufacturer:
FREESCALE
Quantity:
340
4.2
The 802.15.4 modem has two data transfer modes:
The Freescale 802.15.4 MAC software only supports the streaming mode of data transfer. For proprietary
applications, packet mode can be used to conserve MCU resources.
4.3
Figure 7
The 802.15.4 modem adds a four-byte preamble, a one-byte Start of Frame Delimiter (SFD), and a
one-byte Frame Length Indicator (FLI) before the data. A Frame Check Sequence (FCS) is calculated and
appended to the end of the data.
4.4
In the receive signal path, the RF input is converted to low IF In-phase and Quadrature (I & Q) signals
through two down-conversion stages. A Clear Channel Assessment (CCA) can be performed based upon
the baseband energy integrated over a specific time interval. The digital back end performs Differential
Chip Detection (DCD), the correlator “de-spreads” the Direct Sequence Spread Spectrum (DSSS) Offset
QPSK (O-QPSK) signal, determines the symbols and packets, and detects the data.
The preamble, SFD, and FLI are parsed and used to detect the payload data and FCS (which are stored in
RAM in Packet Mode). A two-byte FCS is calculated on the received data and compared to the FCS value
appended to the transmitted data, which generates a Cyclical Redundancy Check (CRC) result. A
parameter of received energy during the reception called the Link Quality Indicator is measured over a 64
µs period after the packet preamble and stored in an SPI register.
If the 802.15.4 modem is in Packet Mode, the data is stored in RAM and processed as an entire packet.
The MCU is notified that an entire packet has been received via an interrupt.
If the 802.15.4 modem is in streaming mode, the MCU is notified by a recurring interrupt on a
word-by-word basis.
Figure 8
about -57 dBm input power which is well above 802.15.4 Standard requirements.
Freescale Semiconductor
1. Packet Mode — Data is buffered in on-chip RAM
2. Streaming Mode — Data is processed word-by-word
shows CCA reported power level versus input power. Note that CCA reported power saturates at
shows the packet structure of the 802.15.4 modem. Payloads of up to 125 bytes are supported.
Data Transfer Modes
Packet Structure
Receive Path Description
4 bytes
Preamble
1 byte
SFD
Figure 7. 802.15.4 modem Packet Structure
MC13211/212/213 Technical Data, Rev. 1.8
1 byte
FLI
125 bytes maximum
Payload Data
2 bytes
FCS
17