MC13212 Freescale Semiconductor, MC13212 Datasheet - Page 21
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MC13212
Manufacturer Part Number
MC13212
Description
IC TXRX RF 2.4GHZ FLSH 32K 71LGA
Manufacturer
Freescale Semiconductor
Series
MC1321xr
Datasheet
1.1321XCSK-BDM.pdf
(70 pages)
Specifications of MC13212
Frequency
2.4GHz
Data Rate - Maximum
250kbps
Modulation Or Protocol
802.15.4 Zigbee
Applications
General Purpose
Power - Output
3dBm
Sensitivity
-92dBm
Voltage - Supply
1.8 V ~ 3.6 V
Current - Receiving
42mA
Current - Transmitting
35mA
Data Interface
PCB, Surface Mount
Memory Size
32kB Flash, 2kB RAM
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
71-LGA
Mounting Style
SMD/SMT
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC13212
Manufacturer:
FREESCALE
Quantity:
20 000
Company:
Part Number:
MC13212R2
Manufacturer:
FREESCALE
Quantity:
340
4.6.2.2
Although the SPI port of the MCU transfers data in bursts of 8 bits, the 802.15.4 modem requires that a
complete SPI transaction be framed by CE, and there will be three (3) or more bursts per transaction. The
assertion of CE to low signals the start of a transaction. The first SPI burst is a write of an 8-bit header to
the transceiver (MOSI is valid) that defines a 6-bit address of the internal resource being accessed and
identifies the access as being a read or write operation. In this context, a write is data written to the 802.15.4
modem and a read is data written to the SPI master. The following SPI bursts will be either the write data
(MOSI is valid) to the transceiver or read data from the transceiver (MISO is valid).
Although the SPI bus is capable of sending data simultaneously between master and slave, the 802.15.4
modem never uses this mode. The number of data bytes (payload) will be a minimum of 2 bytes and can
extend to a larger number depending on the type of access. After the final SPI burst, CE is negated to high
to signal the end of the transaction.
An example SPI read transaction with a 2-byte payload is shown in
Freescale Semiconductor
SPI Transaction Operation
SPICLK
CE
MISO
MOSI
Clock Burst
Figure 11. SPI Read Transaction Diagram
MC13211/212/213 Technical Data, Rev. 1.8
Header
Valid
Valid
Read data
Figure
Valid
11.
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