MFRC52301HN1,157 NXP Semiconductors, MFRC52301HN1,157 Datasheet - Page 22
MFRC52301HN1,157
Manufacturer Part Number
MFRC52301HN1,157
Description
IC READER 13.56MHZ 32-HVQFN
Manufacturer
NXP Semiconductors
Datasheet
1.MFRC52301HN1151.pdf
(97 pages)
Specifications of MFRC52301HN1,157
Frequency
13.56MHz
Package / Case
32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Rf Type
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935282956157
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NXP Semiconductors
MFRC523_34
Product data sheet
PUBLIC
Fig 19. I
SDA high
SCL high
SDA high
SCL high
2
C-bus HS mode protocol frame
8.3.4.12 MFRC523 in lower speed modes
8.3.4.11 Switching between F/S mode and HS mode
= Master current source pull-up
= Resistor pull-up
S
t
H
Sr
After reset and initialization, the MFRC523 is in Fast mode (which is in effect F/S mode as
Fast mode is downward-compatible with Standard mode). The connected MFRC523
recognizes the “S 00001XXX A” sequence and switches its internal circuitry from the Fast
mode setting to the HS mode setting.
The following actions are taken:
It is possible for system configurations that do not have other I
the communication to switch to HS mode permanently. This is implemented by setting
Status2Reg register’s I
is not required to be sent. This is not defined in the specification and must only be used
when no other devices are connected on the bus. In addition, spikes on the I
must be avoided because of the reduced spike suppression.
MFRC523 is fully downward-compatible and can be connected to an F/S mode I
system. The device stays in F/S mode and communicates at F/S mode speeds because a
master code is not transmitted in this configuration.
1. Adapt the SDA and SCL input filters according to the spike suppression requirement
2. Adapt the slope control of the SDA output stages.
in HS mode.
1
1
2 to 5
7-bit SLA
All information provided in this document is subject to legal disclaimers.
6
Rev. 3.5 — 24 September 2010
2 to 5
7
8-bit master code 0000 1xxx
2
CForceHS bit to logic 1. In permanent HS mode, the master code
R/W
8
9
A
115235
F/S mode
HS mode
1
6
2 to 5
n + (8-bit data
7
6
7
+
8
8
A/A)
9
2
C-bus devices involved in
A
9
Contactless reader IC
Sr P
t
FS
t
MFRC523
1
If Sr (dotted lines)
then HS mode
If P then
F/S mode
© NXP B.V. 2010. All rights reserved.
t
H
2
C-bus lines
msc618
2
C-bus
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