XR16L580IM-F Exar Corporation, XR16L580IM-F Datasheet - Page 20
![IC UART FIFO 16B 48TQFP](/photos/16/10/161019/tqfp-48_sml.jpg)
XR16L580IM-F
Manufacturer Part Number
XR16L580IM-F
Description
IC UART FIFO 16B 48TQFP
Manufacturer
Exar Corporation
Datasheet
1.XR16L580IL24TR-F.pdf
(52 pages)
Specifications of XR16L580IM-F
Number Of Channels
1, UART
Package / Case
48-TQFP
Features
*
Fifo's
16 Byte
Protocol
RS232, RS422
Voltage - Supply
2.25 V ~ 5.5 V
With Auto Flow Control
Yes
With Irda Encoder/decoder
Yes
With False Start Bit Detection
Yes
With Modem Control
Yes
With Cmos
Yes
Mounting Type
Surface Mount
Data Rate
3.125 Mbps
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.25 V
Supply Current
2 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
No. Of Channels
1
Uart Features
Selectable RX And TX FIFO Trigger Levels, Automatic Software Flow Control, Complete Modem Interface
Supply Voltage Range
2.25V To 5.5V
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XR16L580IM-F
Manufacturer:
Exar Corporation
Quantity:
10 000
Part Number:
XR16L580IM-F
Manufacturer:
EXAR/艾科嘉
Quantity:
20 000
XR16L580
SMALLEST 2.25V TO 5.5V UART WITH 16-BYTE FIFO AND POWERSAVE
The L580 supports low voltage system designs, hence, a sleep mode with wake-up interrupt and Power-Save
feature is included to reduce power consumption when the device is not actively used.
All of these conditions must be satisfied for the L580 to enter sleep mode:
The L580 stops its crystal oscillator to conserve power in the sleep mode. User can check the XTAL2 pin for
no clock output as an indication that the device has entered the sleep mode.
The L580 resumes normal operation by any of the following:
If the L580 is awakened by any one of the above conditions, it issues an interrupt as soon as the oscillator
circuit is up and running and the device is ready to transmit/receive. This interrupt has the same encoding (bit-
0 of ISR register = 1) as "no interrupt pending" and will clear when the ISR register is read. This will show up in
the ISR register only if no other interrupts are enabled. The L580 will return to the sleep mode automatically
after all interrupting conditions have been serviced and cleared. If the L580 is awakened by the modem inputs,
a read to the MSR is required to reset the modem inputs. In any case, the sleep mode will not be entered while
an interrupt is pending. The L580 will stay in the sleep mode of operation until it is disabled by setting IER bit-4
to a logic 0.
If the address lines, data bus lines, IOW#, IOR#, CS# and modem input lines remain steady when the L580 is
in sleep mode, the maximum current will be in the microamp range as specified in the DC Electrical
Characteristics on
current can be up to 100 times more. If not using the Power-Save feature, an external buffer would be required
to keep the address and data bus lines from toggling or floating to achieve the low current. But if the Power-
Save feature is enabled (PwrSave pin connected to VCC), this will eliminate the need for an external buffer by
internally isolating the address, data and control signals (see Figure 1 on page 1) from other bus activities that
could cause wasteful power drain. The L580 enters Power-Save mode when this pin is connected to VCC and
the L580 is in sleep mode (see Sleep Mode section above).
Since Power-Save mode isolates the address, data and control signals, the device will wake-up only by :
The L580 will return to the Power-Save mode automatically after a read to the MSR (to reset the modem
inputs) and all interrupting conditions have been serviced and cleared. The L580 will stay in the Power-Save
mode of operation until it is disabled by setting IER bit-4 to a logic 0 and/or the Power-Save pin is connected to
GND.
2.18
2.18.1
2.18.2
■
■
■
■
■
■
■
■
■
■
no interrupts pending (ISR bit-0 = 1)
the 16-bit divisor programmed in DLM and DLL registers is a non-zero value
sleep mode is enabled (IER bit-4 = 1)
modem inputs are not toggling (MSR bits 0-3 = 0)
RX input pin is idling at a logic 1
a receive data start bit transition (logic 1 to 0) at the RX input pin
a data byte is loaded to the transmitter, THR or FIFO
a change of logic state on any of the modem or general purpose serial inputs: CTS#, DSR#, CD#, RI#
a receive data start bit transition (logic 1 to 0) at the RX input pin or
a change of logic state on any of the modem or general purpose serial inputs: CTS#, DSR#, CD# or RI#
Sleep Mode with Wake-Up Interrupt and Power-Save Feature
Sleep Mode
Power-Save Feature
page
37. If the input lines are floating or are toggling while the L580 is in sleep mode, the
20
REV. 1.4.1