SPEAR320-2 STMicroelectronics, SPEAR320-2 Datasheet - Page 11

IC MPU ARM9 289LFBGA

SPEAR320-2

Manufacturer Part Number
SPEAR320-2
Description
IC MPU ARM9 289LFBGA
Manufacturer
STMicroelectronics
Series
SPEAr®r
Datasheet

Specifications of SPEAR320-2

Processor Type
ARM Microprocessor
Speed
333MHz
Voltage
1.14 V ~ 3.6 V
Mounting Type
Surface Mount
Package / Case
289-LFBGA
Processor Series
SPEAr320
Core
ARM926EJ-S
Data Bus Width
16 bit
Maximum Clock Frequency
333 MHz
Operating Supply Voltage
1.2 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Data Ram Size
8 KB
Interface Type
I2C, UART, USB, Serial
Number Of Programmable I/os
102
Number Of Timers
4
Program Memory Size
32 KB
Program Memory Type
ROM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
497-10843

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SPEAr320
3
Figure 2.
3.1
NAND Flash
Mobile DDR
Debug, trace
NOR Flash
EEPROM
DDR2
FPGA
Flash
SD-Card
SDIO
MMC
Architecture overview
The SPEAr320 internal architecture is based on several shared subsystem logic blocks
interconnected through a multilayer interconnection matrix.
The switch matrix structure allows different subsystem dataflow to be executed in parallel
improving the core platform efficiency.
High performance master agents are directly interconnected with the memory controller
reducing the memory access latency. The overall memory bandwidth assigned to each
master port can be programmed and optimized through an internal efficient weighted round-
robin arbitration mechanism.
Typical system architecture using SPEAr320
CPU ARM 926EJ-S
The core of the SPEAr320 is an ARM926EJ-S reduced instruction set computer (RISC)
processor.
It supports the 32-bit ARM and 16-bit Thumb instruction sets, enabling the user to trade off
between high performance and high code density and includes features for efficient
execution of Java byte codes.
SDIO/MMC
FSMC
ETM9
JTAG
controller
EMI
memory
24 MHz
SMI
DDR
Clock, Reset
RTC
Parallel
port
32 kHz
TouchScreen
8-channel DMA
up to 333 MHz
ARM 926EJ-S
GPIO
6 timers / WD
ADC
SPEAr320
4x PWM
JPEG CODEC
Doc ID 16755 Rev 4
accelerator
accelerator
C3 Crypto
controller
LCD
3x UART
Interrupt/syst controller
8 KB embed. SRAM
32 KB embed. ROM
MMU
3x SSP
2x Ethernet
Phy
2x I2C
USB2.0 PHY
device
USB2.0 PHY
Host
USB2.0 PHY
Host
2x CAN
Internet
Access
IrdDA
Controller Automation Network
Architecture overview
CAN
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