WPIXF1104BE.B1-993991 Cortina Systems Inc, WPIXF1104BE.B1-993991 Datasheet - Page 100

• Manufacturer Part Number: WPIXF1104BE.B1-993991
• Description: IC ETH MAC SPI3 4-PORT 552-FCBGA
• Manufacturer: Cortina Systems Inc

Specifications of WPIXF1104BE.B1-993991

• Controller Type: Ethernet Controller, MAC
• Interface: SPI-3
• Voltage - Supply: 1.8V, 2.5V, 3.3V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 575-BCBGA Exposed Pad (552 Bumps)
• Operating Supply Voltage (typ): 1.8/2.5/3.3V
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 1008-1045

IXF1104 MAC
Datasheet
278757, Revision 13.2
17 September 2008
5.6.2.1
5.6.2.2
Equation 1
Table 28
Cortina Systems
The SerDes receive interface receives serialized data at 1.25 GHz. The interface is
differential with two signals for the receive operation. The equalizer receives a differential
signal that is equalized for the assumed media channel. The SerDes transmit and receive
interfaces are designed to operate within a 100 Ω differential environment and all
terminations are included on the device.
Transmitter Operational Overview
The transmit section of the IXF1104 MAC has to serialize the Ten Bit Interface (TBI) data
from the IXF1104 MAC MAC section and outputs this data at 1.25 GHz differential signal
levels. The 1.25 GHz differential SerDes signals are compliant with the Small Form Factor
Pluggable (SFP) Multi-Source Agreement (MSA).
The transmitter section takes the contents of the data register within the MAC and
synchronously transfers the data out, ten bits at a time – Least Significant Bit (LSB) first,
followed by the next Most Significant Bit (MSB). When these ten bits have been serialized
and transmitted, the next word of 10-bit data from the MAC is ready to be serialized for
transmission.
The data is transmitted by the high-speed current mode differential SerDes output stage
using an internal 1.25 GHz clock generated from the 125 MHz clock input.
Transmitter Programmable Driver-Power Levels
The IXF1104 MAC SerDes core has programmable transmitter power levels to enhance
usability in any given application.The SerDes Registers are programmable to allow
adjustment of the transmit core driver output power. When driving a 100 Ω differential
terminated network, these output power settings effectively establish the differential voltage
swings at the driver output.
The
settings. The selected power setting of these inputs is applied to each of the transmit core
drivers on a per-port basis.
power settings of the transmit drivers as a function of the Driver Power Control inputs. The
normalized current setting is 10 mA, which corresponds to the normalized power setting of
1.0. This is the default setting of the IXF1104 MAC SerDes interface. Other values listed in
the Normalized Driver Power Setting column are multiples of 10 mA. For example, with
inputs at 1110, the driver power is the following:
.5 x 10 mA = 5 mA.
SerDes Driver TX Power Levels
®
Note:
DRVPWRx[3]
IXF1104 4-Port Gigabit Ethernet Media Access Controller
TX Driver Power Level Ports 0 - 3 ($0x784)
0
1
1
1
All other values are reserved.
DRVPWRx[2]
0
0
1
1
Table 28, SerDes Driver TX Power Levels
DRVPWRx[1]
1
1
0
1
DRVPWRx[0]
allows the selection of four discrete power
1
1
1
0
Driver Power
Normalized
Setting
1.33
2.0
1.0
0.5
lists the normalized
Driver Power
13.3 mA
20 mA
10 mA
5 mA
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