WPIXF1104BE.B1-993991 Cortina Systems Inc, WPIXF1104BE.B1-993991 Datasheet - Page 160

• Manufacturer Part Number: WPIXF1104BE.B1-993991
• Description: IC ETH MAC SPI3 4-PORT 552-FCBGA
• Manufacturer: Cortina Systems Inc

Specifications of WPIXF1104BE.B1-993991

• Controller Type: Ethernet Controller, MAC
• Interface: SPI-3
• Voltage - Supply: 1.8V, 2.5V, 3.3V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 575-BCBGA Exposed Pad (552 Bumps)
• Operating Supply Voltage (typ): 1.8/2.5/3.3V
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 1008-1045

IXF1104 MAC
Datasheet
278757, Revision 13.2
17 September 2008
Table 83
Table 84
Cortina Systems
FC Enable ($ Port_Index + 0x12)
FC Back Pressure Length ($ Port_Index + 0x13)
®
Register Description: Indicates which flow control mode is used for the RX and TX MAC.
1. RO = Read Only, No clear on Read; R = Read, Clear on Read; W = Write only; R/W = Read/Write, No
FC Back Pressure
Length
1. RO = Read Only, No clear on Read; R = Read, Clear on Read; W = Write only; R/W = Read/Write, No
31:3
Bit
IXF1104 4-Port Gigabit Ethernet Media Access Controller
2
1
0
clear; R/W/C = Read/Write, Clear on Write
clear; R/W/C = Read/Write, Clear on Write
Name
Reserved
TX HDFC
TX FDFC
RX FDFC
Name
This register sets number the byte cycles
for which the collision has to be applied.
The 6-bit configuration holds the value in
bytes, which applies to the minimum
length/duration of back pressure in half-
duplex mode. Flow control in the receive
path is executed by deliberately colliding
the incoming packets in half-duplex mode.
Register bits 5:0 are used alone.
Reserved
Description
When TX HDFC is enabled (half-duplex mode
only), the MAC generates deliberate collisions on
incoming packets when the RX FIFO occupancy
crosses the High Watermark (flow control).
0 = Disable TX half-duplex flow control
1 = Enable TX half-duplex flow control
0 = Disable TX full-duplex flow control [the MAC
1 = Enable TX full-duplex flow control [enables the
0 = Disable RX full-duplex flow control [the MAC
1 = Enable RX full-duplex flow control [MAC will
will not generate internally any flow control
frames based on the RX FIFO watermarks or
the Transmit Pause Control interface
MAC to send flow control frames to the link
partner based on the RX FIFO programmable
watermarks or the Transmit Pause Control
interface]
will not respond to flow control frames sent to it
by the link partner]
respond to flow control frames sent by the link
partner and will stop packet transmission for
the time specified in the flow control frame]
Description
Port Add +
Address
0x13
Type
Type
R/W
R/W
R/W
R/W
R
1
1
0x0000000C
0x00000007
0x00000000
Default
Default
1
1
1
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