WM8351GEB/V Wolfson Microelectronics, WM8351GEB/V Datasheet - Page 147

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WM8351GEB/V

Manufacturer Part Number
WM8351GEB/V
Description
Audio CODECs Audio CODEC plus pwr management
Manufacturer
Wolfson Microelectronics
Datasheet

Specifications of WM8351GEB/V

Number Of Adc Inputs
2
Number Of Dac Outputs
2
Conversion Rate
48 KSPS
Interface Type
Serial (2-Wire, 3-Wire, 4-Wire)
Resolution
12 bit
Operating Supply Voltage
3.7 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
BGA
Minimum Operating Temperature
- 25 C
Number Of Channels
2 ADC/2 DAC
Supply Current
260 uA
Thd Plus Noise
- 83 dB
Audio Codec Type
Stereo
No. Of Adcs
2
No. Of Dacs
2
No. Of Input Channels
8
No. Of Output Channels
6
Adc / Dac Resolution
24bit
Adcs / Dacs Signal To Noise Ratio
95dB
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Production Data
w
R172 (ACh)
Current Sink
Driver A
Table 96 Controlling the Sink Current for ISINKA
Note that currents above 40mA are not supported continuously; these settings are intended for flash
mode only.
16.2.3
The current sink can either sink current continuously (LED mode) or in short bursts (flash mode). The
operating mode is selected by the CS1_FLASH_MODE bit, as described in Table 97.
In LED mode, the current sink is controlled by setting CS1_DRIVE. For as long as this bit is
asserted, the LED is enabled continuously.
In Flash mode, the current sink may be set to automatically flash every 4 seconds by setting
CS1_FLASH_RATE = 1, or may be triggered normally by setting CS1_FLASH_RATE = 0.
When normal triggering is selected in Flash mode, the trigger control can be either a GPIO Flash
input (see Section 20) or a register control. Setting CS1_TRIGSRC = 1 selects GPIO as the trigger.
The flash will be edge triggered by the selected GPIO input. Setting CS1_TRIGSRC = 0 selects the
register field CS1_DRIVE as the trigger. In this case, writing a 1 to CS1_DRIVE will trigger a flash;
this bit will be reset at the end of the flash.
In all flash modes, the duration of each flash is set by CS1_FLASH_DUR. The status of each current
sink may be read from the CS1_DRIVE bit.
In all modes, the current sink must also be enabled via the applicable CS1_ENA bit (see Table 95).
Note that some photo-flash applications may require a reservoir capacitor to store sufficient charge
for the flash.
ADDRESS
FLASH MODE
BIT
5:0
CS1_ISEL
LABEL
DEFAULT
00 0000
ISINKA current = 4.05μA × 2
where CS1_ISEL is an unsigned binary
number
Minimum: 00 0000 = 4.05μA,
Maximum: 11 1111 = 220mA
(from circuit simulation)
or
CS1_ISEL = 13.3 × log (desired current /
4.05μA)
DESCRIPTION
PD, March 2010, Rev 4.2
WM8351
CS1_ISEL/4
147

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