PIC18F6680-I/L Microchip Technology, PIC18F6680-I/L Datasheet - Page 286

• Manufacturer Part Number: PIC18F6680-I/L
• Description: Microcontrollers (MCU) 64KB 3328 RAM 52 I/O
• Manufacturer: Microchip Technology

Specifications of PIC18F6680-I/L

• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3.25 KB
• Interface Type: I2C/SPI/AUSART/CAN
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 5
• Operating Supply Voltage: 4.2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12-ch x 10-bit
• Program Memory Type: Flash
• Program Memory Size: 64 KB
• Package / Case: PLCC-68
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC18F6585/8585/6680/8680
REGISTER 23-4:
DS30491C-page 284
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Mode 0
Mode 1
Mode 2
COMSTAT: COMMUNICATION STATUS REGISTER
FIFOEMPTY RXBnOVFL
bit 7
Legend:
C = Clearable bit
- n = Value at POR ‘1’ = Bit is set
Mode 0:
RXB0OVFL: Receive Buffer 0 Overflow bit
1 = Receive Buffer 0 overflowed
0 = Receive Buffer 0 has not overflowed
Mode 1:
Unimplemented: Read as ‘0’
Mode 2:
FIFOEMPTY: FIFO Not Empty bit
1 = Receive FIFO is not empty
0 = Receive FIFO is empty
Mode 0:
RXB1OVFL: Receive Buffer 1 Overflow bit
1 = Receive Buffer 1 overflowed
0 = Receive Buffer 1 has not overflowed
Mode 1, 2:
RXBnOVFL: Receive Buffer Overflow bit
1 = Receive buffer has overflowed
0 = Receive buffer has not overflowed
TXBO: Transmitter Bus-Off bit
1 = Transmit error counter > 255
0 = Transmit error counter
TXBP: Transmitter Bus Passive bit
1 = Transmit error counter > 127
0 = Transmit error counter
RXBP: Receiver Bus Passive bit
1 = Receive error counter > 127
0 = Receive error counter
TXWARN: Transmitter Warning bit
1 = 127
0 = Transmit error counter
RXWARN: Receiver Warning bit
1 = 127
0 = Receive error counter
EWARN: Error Warning bit
This bit is a flag of the RXWARN and TXWARN bits.
1 = The RXWARN or the TXWARN bits are set
0 = Neither the RXWARN or the TXWARN bits are set
RXB0OVFL RXB1OVFL
R/C-0
R/C-0
U-0
—
Transmit error counter > 95
Receive error counter > 95
RXBnOVFL
R/C-0
R/C-0
R/C-0
R = Readable bit
127
95
255
127
95
TXBO
TXBO
TXB0
R-0
R-0
R-0
TXBP
TXBP
TXBP
W = Writable bit
‘0’ = Bit is cleared x = Bit is unknown
R-0
R-0
R-0
RXBP
RXBP
RXBP
R-0
R-0
R-0
U = Unimplemented bit, read as ‘0’
TXWARN RXWARN EWARN
TXWARN RXWARN EWARN
TXWARN RXWARN EWARN
 2004 Microchip Technology Inc.
R-0
R-0
R-0
R-0
R-0
R-0
R-0
R-0
R-0
bit 0