MPC8536BVTATH Freescale Semiconductor, MPC8536BVTATH Datasheet - Page 4

• Manufacturer Part Number: MPC8536BVTATH
• Description: Microprocessors (MPU) 8536 INDUSTRIAL 1250
• Manufacturer: Freescale Semiconductor

Specifications of MPC8536BVTATH

• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 1250 MHz
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Interface Type: I2C, SPI, UART
• Minimum Operating Temperature: 0 C
• Package / Case: FCPBGA-783
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Pin Map
1.1
See
the MPC8536E.
4
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
1
2
3
4
5
6
7
8
9
MAPAR_
MAPAR_
MVREF
MDQS
MDQS
MDQ
GND
MBA
OUT
GND
MCK
MCK
ERR
GND
MDQ
MDQ
MDQ
MDQ
MDQ
MDQ
MDQ
MDQ
MDQ
MDQ
GND
Table 1
[44]
MA
[10]
MA
MA
MA
[11]
[26]
[30]
[25]
[29]
[11]
[15]
[12]
A
[0]
[3]
[0]
[3]
[6]
[3]
[1]
[9]
[8]
[0]
A
MDQS
MDQS
GV DD
GV DD
MWE
MDM
MDM
MDQ
MDQ
MBA
MCK
MCK
GND
MBA
MDQ
MDQ
MDQ
MDQ
MDQ
MDQ
MDQ
MDQ
MDQ
GND
LDP
[40]
[45]
NC
MA
MA
[27]
[31]
[24]
[28]
[10]
[14]
[13]
[1]
[0]
[3]
[0]
[9]
[2]
[3]
[3]
[1]
[1]
[5]
[1]
[2]
B
B
Pin Map
for the MPC8535E pinout, which is a subset of the MPC8536E.
MDQS
MECC
MECC
MDQS
MDQS
AVDD_
MRAS
GV DD
GV DD
GV DD
GV DD
GV DD
GV DD
MDM
MDQ
MDQ
MDQ
MDM
MCS
GND
GND
GND
GND
GND
LBIU
LAD
[41]
MA
MA
[19]
NC
[25]
[5]
[5]
[2]
[2]
[5]
[3]
[6]
[2]
[2]
[0]
[0]
C
C
LSYNC_
LSYNC_
MDQS
GV DD
GV DD
MECC
MDQS
MECC
GV DD
GV DD
MDQS
MDQ
MCS
GND
GND
MDQ
GND
MDM
MDQ
MDQ
MDQ
GND
MDQ
GND
OUT
[32]
NC
MA
NC
MA
[12]
[23]
[17]
D
[5]
[0]
[4]
[7]
[8]
[1]
[2]
[3]
[6]
[0]
[4]
IN
D
MPC8535E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 3
MDQS
MDQS
GV DD
MODT
MODT
MCAS
GV DD
GV DD
GV DD
GV DD
GV DD
MDQ
GND
MDQ
GND
GND
MDQ
MDQ
GND
MDQ
LAD
LAD
LDP
LAD
LAD
LAD
[46]
[36]
MA
MA
[14]
[18]
[16]
[27]
[24]
[22]
[21]
[20]
[0]
[2]
[8]
[8]
[2]
[7]
[3]
E
E
SEE DETAIL A
SEE DETAIL C
MODT
MECC
MECC
GV DD
GV DD
BV DD
BV DD
MDQ
MDQ
MDQ
MDM
MDQ
MDQ
GND
GND
GND
MDQ
GND
GND
LAD
LAD
LAD
LAD
LAD
[47]
[42]
[33]
MA
[13]
MA
MA
[15]
NC
[22]
[21]
[20]
[29]
[23]
[19]
[18]
[17]
[3]
[7]
[2]
[8]
[5]
F
F
LGPL2/
GV DD
GV DD
GV DD
MCKE
GV DD
MECC
MECC
MDM
LFRE
MDQ
MDQ
MDQ
MCS
GND
GND
GND
LOE/
GND
LCS
LCS
LAD
LAD
LAD
LAD
LAD
LAD
LDP
[34]
[43]
[37]
MA
[31]
[31]
[30]
[28]
[26]
[16]
[15]
LA
G
[4]
[3]
[1]
[2]
[0]
[4]
[4]
[1]
[1]
G
LGPL3/
LWE[3]/
LWE[1]/
LWE[2]/
LBS[3]
LBS[1]
LBS[2]
GV DD
MODT
MCKE
MCKE
GV DD
GV DD
DREQ2
LFWP
BV DD
MDIC
DMA_
LCLK
LCLK
GND
MDQ
MDQ
GND
MCS
MCK
MCK
MCK
LCS5/
LCS
LCS
LAD
LAD
[35]
[38]
[30]
[14]
[13]
[1]
[1]
[5]
[3]
[0]
[1]
[4]
[0]
LA
[2]
[3]
[0]
[2]
H
H
LGPL0/
LFCLE
LBCTL
MDQS
GV DD
DACK2
BV DD
BV DD
LWE0/
LFWE
BV DD
Figure 2. MPC8535E Pin Map Bottom View
BV DD
LBS0/
LCLK
LALE
MDQ
MDQ
MDQ
MDQ
MCK
MCK
MCK
GND
MCK
GND
GND
LCS6/
DMA_
GND
GND
LAD
[56]
[60]
[52]
[39]
NC
NC
[12]
[4]
[2]
[5]
[1]
[4]
[1]
J
J
LGPL1/
LGPL5
GV DD
MDQS
MCKE
GV DD
CORE
GV DD
LFALE
VDD_
MDIC
MDQ
MDQ
MDQ
MCK
GND
GND
GND
GND
LCS
LAD
LAD
LAD
LAD
LDP
LAD
LAD
[57]
[61]
[53]
[28]
[29]
[11]
[10]
NC
LA
LA
[4]
[2]
[1]
[1]
[0]
[0]
[3]
[4]
[7]
[0]
K
K
LUPWAIT/
IMP_CAL
X2V DD
X2GND
DDONE2
LGPL4/
LPBSE/
CORE
CORE
BV DD
MDM
MDM
MDQ
MDQ
SD2_
SD2_
PLL_
VDD_
VDD_
LCS7/
DMA_
LGTA/
GND
Rsvd
Rsvd
GND
GND
GND
LFRB
GND
_TX
TPD
LAD
LAD
LAD
LAD
LAD
LAD
[49]
[48]
[27]
[7]
NC
LA
[6]
[1]
[2]
[5]
[6]
[9]
[8]
L
L
IMP_CAL
S2GND
S2V DD
X2GND
SD2_TX
SD2_TX
SD1_TX
SD1_TX
GV DD
MDQS
MDQS
MDQS
VDD_
CORE
VDD_
CORE
VDD_
VDD_
XGND
XV DD
XGND
SV DD
SGND
SD2_
REF_
SD2_
REF_
SD1_
GND
GND
GND
PLAT
GND
PLAT
CLK
CLK
_RX
NC
M
[7]
[6]
[6]
[1]
[1]
[0]
[0]
M
SD2_RX
SD2_RX
SD1_TX
SD1_TX
SD1_RX
SD1_RX
S2GND
X2GND
MDQS
S2V DD
X2V DD
GV DD
CORE
CORE
XGND
XV DD
SV DD
SGND
VDD_
VDD_
VDD_
PLAT
GND
MDQ
MDQ
GND
GND
GND
GND
[50]
[54]
[7]
NC
NC
N
[1]
[1]
[1]
[1]
[0]
[0]
N
SD2_RX
SD2_RX
SD2_TX
SD2_TX
SD1_TX
SD1_TX
SD1_RX
SD1_RX
S2GND
S2GND
CORE
CORE
XV DD
XGND
SGND
SGND
SV DD
MDQ
MDQ
VDD_
VDD_
VDD_
VDD_
MDM
MDQ
GND
GND
GND
PLAT
GND
PLAT
[58]
[62]
[51]
[55]
NC
P
[0]
[0]
[0]
[0]
[2]
[2]
[1]
[1]
P
IMP_CAL
SD1_RX
SD1_RX
S2V DD
X2V DD
X2GND
SD1_TX
SD1_TX
GV DD
VDD_
CORE
VDD_
CORE
VDD_
XV DD
XGND
SV DD
SGND
SV DD
SD2_
MDQ
MDQ
Rvsd
Rvsd
GND
GND
GND
PLAT
GND
_RX
[59]
[63]
NC
NC
NC
R
[3]
[3]
[2]
[2]
R
1588_PULSE
TSEC3_
TSEC3_
TSEC3_
TSEC3_
TSEC3_
TSEC3_
TSEC3_
TSEC3_
SD1_RX
SD1_RX
AGND_
AVDD_
SRDS2
SRDS2
RX_ER
CORE
CORE
XV DD
XGND
SV DD
SV DD
SGND
SD2_
TSEC_
_OUT2
VDD_
VDD_
VDD_
PLAT
VDD_
PLAT
PLL_
TXD
TXD
TXD
TXD
CRS
TXD
GND
GND
GND
Rsvd
Rsvd
TPA
COL
[1]
[0]
[2]
[3]
[7]
[3]
[3]
T
T
1588_TRIG
GTX_CLK
TSEC3_
RX_CLK
TSEC3_
TSEC3_
TSEC3_
TSEC3_
TSEC3_
TSEC3_
TSEC3_
TX_CLK
TSEC3_
TSEC3_
SD1_TX
SD1_TX
TX_ER
TV DD
_OUT[0]
CORE
CORE
XGND
XV DD
SGND
SV DD
SGND
TSEC_
VDD_
VDD_
VDD_
REF_
REF_
RXD
RXD
GND
RXD
TXD
RXD
RXD
GND
GND
PLAT
GND
SD1_
SD1_
CLK
CLK
[1]
[2]
[5]
[5]
[7]
[6]
U
[4]
[4]
U
Figure 2
1588_PULSE
OUT/READY
1588_CLK
MSRCID
TSEC3_
TSEC3_
TSEC3_
TSEC3_
TSEC3_
TSEC3_
TSEC3_
SENSE-
/QUIESCE
MDVAL
SENSE-
SD1_TX
SD1_TX
AGND_
RX_DV
TX_EN
CORE
XGND
XV DD
SGND
SRDS
TV DD
TSEC_
TSEC_
_OUT1
VDD_
VDD_
SD1_
SD1_
PLL_
RXD
RXD
RXD
GND
_OUT
GND
PLAT
GND
TRIG_
PLL_
TXD
TXD
VSS
TPA
TPD
[3]
[0]
[4]
[6]
[4]
NC
V
[2]
[5]
[5]
V
1588_TRIG
1588_TRIG
1588_TRIG
GTX_CLK
TSEC1_
TSEC1_
TSEC1_
TSEC1_
TSEC1_
TSEC1_
MSRCID
MSRCID
MSRCID
MSRCID
TRIG_IN
SENSE-
SD1_TX
SD1_TX
TX_EN
TSEC_
AVDD_
1588_
_OUT[1]
XGND
SGND
TSEC_
TSEC_
TSEC_
PCI1_
VDD_
PCI1_
XV DD
SV DD
SV DD
SRDS
_IN[1]
_IN[0]
CLK_
REQ
PLAT
TXD
TXD
TXD
TXD
CLK
OUT
GNT
W
NC
W
[3]
[1]
[2]
[0]
[4]
[0]
[1]
[3]
[1]
[0]
[6]
[6]
provides a bottom view of the pin map of
TSEC1_
TSEC1_
TSEC1_
TSEC1_
TSEC1_
TSEC1_
TSEC1_
PCI1_REQ
SD1_RX
SD1_RX
SEE DETAIL B
[3]/GPIO
SEE DETAIL D
SD1_TX
SD1_TX
RX_ER
UART_
PCI1_
PCI1_
OV DD
XV DD
XGND
SV DD
SV DD
SGND
MDIO
RXD
RXD
RXD
GND
TXD
RXD
GND
TXD
MDC
CTS
GND
MCP
GNT
EC_
EC_
[30]
IRQ
[1]
[0]
[2]
[4]
[4]
[5]
[1]
AD
[0]
[1]
[7]
[7]
[7]
[4]
[4]
Y
Y
DAT[7]/SPI
TSEC1_
TSEC1_
TSEC1_
RX_CLK
EC_GTX_
TSEC1_
DDONE[0]/
PCI1_GNT
TSTCLK
TSTCLK
SD1_RX
SD1_RX
TSEC1_
CLK125
TSEC1_
GPIO[12]
RX_DV
UART_
TEST_
[3]/GPIO
SOUT
SGND
SGND
LV DD
LV DD
SDHC_
PCI1_
PCI1_
PCI1_
XV DD
SV DD
RXD
_CS[3]
DMA_
GND
GND
AA
TXD
TXD
CRS
SEL
REQ
AA
[29]
[25]
L2_
L1_
IRQ
[3]
[1]
AD
AD
[6]
[7]
[2]
[0]
[6]
[5]
[5]
DDONE[1]/
TSEC1_
TSEC1_
TX_CLK
TSEC1_
TSEC1_
TSEC1_
TSEC1_
USB1_D
USB1_D
DREQ[0]/
GPIO[14]
GPIO[13]
SD1_RX
SD1_RX
TX_ER
UART_
OV DD
PCI1_
OV DD
PCI1_
PCI1_
PCI1_
PCI1_
PCI1_
PERR
SGND
SGND
SV DD
RXD
RXD
RXD
GND
DMA_
DMA_
IRDY
COL
RTS
UDE
AB
[31]
[27]
[22]
[21]
IRQ
IRQ
AB
AD
AD
AD
AD
[0]
[1]
[7]
[6]
[5]
[0]
[8]
[2]
[6]
[6]
DAT[5]/SPI
POWER_
USB1_D
USB1_D
USB2_D
DDRCLK
PCI1_GNT
DEVSEL
SD1_RX
SD1_RX
GPIO[6]
GPIO[7]
GPIO[9]
[4]/GPIO
PCTL0/
PCTL1/
USB2_
PCTL1/
UART_
LSSD_
USB1_
USB1_
USB2_
FAULT
USB2_
OV DD
MODE
PWR-
SDHC_
PCI1_
PCI1_
PCI1_
PCI1_
PCI1_
PCI1_
PCI1_
PCI1_
_CS[1]
GND
NXT
GND
IRQ_
OUT
PAR
AC
SIN
[28]
[26]
[19]
[16]
[13]
AC
[0]
AD
AD
AD
AD
AD
AD
OK
[2]
[3]
[6]
[3]
[5]
[7]
[7]
Freescale Semiconductor
USB1_D
USB2_D
GPIO[10]
GPIO[15]
DDONE[3]
USB1_
USB2_
DACK[0]/
USB2_
DREQ[1]/
UART_
DACK[3]
OV DD
OV DD
OV DD
OV DD
SGND
MISO
IRQ[10]/
IRQ[11]/
PCI1_
PCI1_
C_BE
PCI1_
C_BE
PCI1_
STOP
PCI1_
C_BE
PCI1_
PCI1_
SV DD
DMA_
DMA_
DMA_
DMA_
GND
GND
GND
AD
CLK
CLK
STP
SPI_
CLK
SPI_
RTS
[24]
AD
AD
AD
AD
[4]
[0]
[1]
[3]
[2]
[1]
[7]
[0]
DAT[4]/SPI
POWER_
IMP_CAL
PCI1_REQ
USB1_D
USB1_D
USB2_D
USB2_D
USB2_D
USB2_D
GPIO[11]
[4]/GPIO
FRAME
DACK[1]/
UART_
DREQ[3]
OV DD
PCI1_
IDSEL
PCI1_
PCI1_
PCI1_
PCI1_
OV DD
PCI1_
PCI1_
PCI1_
SDHC_
IRQ[9]/
GND
_CS[0]
GND
DMA_
GND
DMA_
GND
GND
SD1_
CTS
AE
[23]
[20]
[17]
[14]
_TX
AE
AD
AD
AD
AD
AD
AD
EN
[5]
[6]
[1]
[2]
[4]
[7]
[0]
[1]
[9]
[1]
DAT[6]/SPI
USB1_D
USB2_D
USB2_D
USB1_
USB2_
UART_
UART_
SOUT
OV DD
MOSI
SDHC_
OV DD
PCI1_
PCI1_
PCI1_
OV DD
PCI1_
TRDY
PCI1_
SERR
PCI1_
OV DD
PCI1_
PCI1_
OV DD
GND
_CS[2]
NXT
SPI_
REQ
GNT
RTC
TDO
AF
DIR
SIN
IRQ
IRQ
[18]
IRQ
[15]
AF
[0]
[1]
AD
AD
AD
AD
[7]
[3]
[5]
[2]
[2]
[5]
[1]
[3]
[4]
[2]
HRESET_
HRESET
USB3_D
USB3_D
USB3_D
USB3_D
WP/GPIO
SRESET
ASLEEP
GPIO[8]
CKSTP_
USB1_
USB2_
PCTL0/
SDHC_
SDHC_
SDHC_
OV DD
USB3_
USB3_
SDHC_
PCI1_
PCI1_
PCI1_
PCI1_
IIC2_
IIC1_
GND
STP
NXT
DAT
DAT
CLK
SDA
REQ
SCL
TCK
AG
DIR
IRQ
IRQ
[10]
AG
AD
AD
AD
AD
[1]
[3]
[4]
[6]
[5]
[3]
[0]
[4]
IN
[0]
[8]
[3]
[6]
SYSCLK
USB3_D
USB3_D
USB3_D
USB3_D
SDHC_
CD/GPIO
SDHC_
SDHC_
CKSTP_
USB1_
USB3_
USB3_
AVDD_
AVDD_
AVDD_
AVDD_
USB1_
FAULT
SDHC_
CORE
PCI1_
PCI1_
PCI1_
PCI1_
PWR-
TRST
C_BE
Rsvd
CMD
IIC2_
PLAT
DDR
PCI1
IIC1_
CLK
STP
DAT
DAT
SCL
OUT
SDA
CLK
TMS
AH
DIR
[11]
[12]
AH
AD
AD
TDI
[0]
[2]
[5]
[7]
[1]
[2]
[0]
[4]
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28