A2F500M3G-FGG484 Actel, A2F500M3G-FGG484 Datasheet - Page 189

• Manufacturer Part Number: A2F500M3G-FGG484
• Description: FPGA - Field Programmable Gate Array 500K System Gates
• Manufacturer: Actel

Specifications of A2F500M3G-FGG484

• Processor Series: A2F500
• Core: ARM Cortex M3
• Number Of Logic Blocks: 24
• Maximum Operating Frequency: 100 MHz
• Number Of Programmable I/os: 204
• Data Ram Size: 64 KB
• Delay Time: 50 ns
• Supply Voltage (max): 3.6 V
• Supply Current: 2 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: 0 C
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: A2F-Eval-Kit, A2F-Dev-Kit, FlashPro 3, FlashPro Lite, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA
• Mounting Style: SMD/SMT
• Supply Voltage (min): 1.5 V
• Number Of Gates: 500000
• Package / Case: FPBGA-484
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Revision
Draft B
(December 2009)
The "Digital I/Os" section was renamed to the
and information was added regarding digital and analog VCC.
The
section
The terminology for the analog blocks was changed to "programmable analog,"
consisting of two blocks: the analog front-end and analog compute engine. This is
reflected throughout the text and in the
The
eNVM size.
Timing tables were populated with information that has become available for speed
grade –1.
All occurrences of the VMV parameter were removed.
The SDD[n] voltage parameter was removed from
Ratings.
Table 36-4 • Flash Programming Limits – Retention, Storage and Operating
Temperature
Programming, Storage and Operating
The
Table 2-8 • Quiescent Supply Current Characteristics
Table 2-13 • Different Components Contributing to Dynamic Power Consumption in
SmartFusion Devices
Power Consumption in SmartFusion Devices
Figure 2-2 • Timing Model
The temperature associated with the reliability for LVTTL/LVCMOS in
Input Rise Time, Fall Time, and Related I/O Reliability
The values in
Table 2-83 • Electrical Characteristics of the Low Power Oscillator
Electrical Characteristics of the Main Crystal Oscillator
Table 2-88 • eNVM Block Timing, Worst Commercial Case Conditions: T
VCC = 1.425 V
Conditions: T
The performance tables in the
revised, including new data available.
The
"Thermal Characteristics" section
"256-Pin FBGA"
"Product Ordering Codes" table
"SmartFusion Family Product Table"
were revised.
J
Table 2-77 • Combinatorial Cell Propagation Delays
= 85°C, VCC = 1.425 V
was replaced with
and
Table 2-89 • FlashROM Access Time, Worse Commercial Case
table for A2F200 is new.
and
Table 2-14 • Different Components Contributing to the Static
was updated.
"Programmable Analog Specifications" section
Table 2-96 • Analog Sigma-Delta DAC
was revised to add G as an ordering code for
Limits.
Changes
R e v i s i o n 6
Table 2-4 • FPGA and Embedded Flash
was revised extensively.
are new.
"SmartFusion Block
and
were updated.
"I/Os and Operating Voltage" section
"Package I/Os: MSS + FPGA I/Os"
SmartFusion Intelligent Mixed Signal FPGAs
was revised significantly.
was changed from 110º to 100º.
was revised.
Table 2-2 • Analog Maximum
Diagram".
were updated.
is new.
Table 2-33 • I/O
Table 2-82 •
J
is new.
= 85°C,
were
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