74AHCT240D,112 NXP Semiconductors, 74AHCT240D,112 Datasheet
74AHCT240D,112
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74AHCT240D,112 Summary of contents
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Octal buffer/line driver; inverting; 3-state Rev. 2 — 26 November 2010 1. General description The 74AHC240 and 74AHCT240 are 8-bit inverting buffer/line drivers with 3-state outputs. These devices can be used as two 4-bit buffers or one 8-bit ...
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... NXP Semiconductors 4. Functional diagram 2 1A0 17 2A0 4 1A1 15 2A1 6 1A2 13 2A2 8 1A3 11 2A3 1 1OE 19 2OE Fig 1. Logic symbol 5. Pinning information 5.1 Pinning 74AHC240 74AHCT240 1 1OE 2 1A0 2Y0 3 1A1 4 2Y1 5 6 1A2 7 2Y2 1A3 8 2Y3 9 GND 10 Fig 3. Pin configuration SO20 and TSSOP20 74AHC_AHCT240 ...
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... NXP Semiconductors 5.2 Pin description Table 2. Pin description Symbol Pin 1OE 1 2OE 19 1A0, 1A1, 1A2, 1A3 2A0, 2A1, 2A2, 2A3 17, 15, 13, 11 1Y0, 1Y1, 1Y2, 1Y3 18, 16, 14, 12 2Y0, 2Y1, 2Y2, 2Y3 GND Functional description [1] Table 3. Function table Control nOE [ HIGH voltage level LOW voltage level don’t care high-impedance OFF-state. ...
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... NXP Semiconductors 8. Recommended operating conditions Table 5. Recommended operating conditions Symbol Parameter 74AHC240 V supply voltage CC V input voltage I V output voltage O T ambient temperature amb t/V input transition rise and fall rate 74AHCT240 V supply voltage CC V input voltage I V output voltage ...
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... NXP Semiconductors Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions I input leakage GND current 5 OFF-state output current 5 supply current 5 input capacitance C output O capacitance 74AHCT240 V HIGH-level input voltage V LOW-level input voltage V HIGH-level ...
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... NXP Semiconductors 10. Dynamic characteristics Table 7. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Symbol Parameter Conditions 74AHC240 t propagation delay nAn to nYn; see enable time nOE to nYn; see disable time nOE to nYn; see dis power dissipation capacitance MHz ...
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... NXP Semiconductors Table 7. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Symbol Parameter Conditions 74AHCT240 t propagation delay nAn to nYn; see enable time nOE to nYn; see disable time nOE to nYn; see dis power dissipation capacitance MHz i [1] Typical values are measured at nominal supply voltage (V ...
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... NXP Semiconductors nOE input nYn output LOW-to-OFF OFF-to-LOW nYn output HIGH-to-OFF OFF-to-HIGH Measurement points are given in V and V are typical voltage output drop that occur with the output load Fig 6. Enable and disable times Table 8. Measurement points Type 74AHC240 74AHCT240 74AHC_AHCT240 Product data sheet 74AHC240 ...
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... NXP Semiconductors negative Test data is given in Table Definitions test circuit Termination resistance should be equal to output impedance Load capacitance including jig and probe capacitance Load resistance Test selection switch. Fig 7. Load circuitry for switching times Table 9. Test data Type Input V I 74AHC240 ...
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... NXP Semiconductors 12. Package outline SO20: plastic small outline package; 20 leads; body width 7 pin 1 index 1 e DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.3 2.45 mm 2.65 0.25 0.1 2.25 0.012 0.096 inches 0.1 0.01 0.004 0.089 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...
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... NXP Semiconductors TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...
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... NXP Semiconductors DHVQFN20: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 20 terminals; body 2.5 x 4.5 x 0.85 mm terminal 1 index area terminal 1 index area DIMENSIONS (mm are the original dimensions) (1) A UNIT max. 0.05 0. 0.2 0.00 0.18 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. ...
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... NXP Semiconductors 13. Abbreviations Table 10. Abbreviations Acronym Description CDM Charge Device Model CMOS Complementary Metal Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model TTL Transistor-Transistor Logic 14. Revision history Table 11. Revision history Document ID Release date 74AHC_AHCT240 v.2 20101126 • ...
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... In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or ...
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... NXP Semiconductors Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. 16. Contact information For more information, please visit: For sales office addresses, please send an email to: 74AHC_AHCT240 Product data sheet 74AHC240 ...
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... NXP Semiconductors 17. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 5 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 6 Functional description . . . . . . . . . . . . . . . . . . . 3 7 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 6 11 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 12 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10 13 Abbreviations ...