74LVCH1T45GW,125 NXP Semiconductors, 74LVCH1T45GW,125 Datasheet - Page 3

TXRX XLATING DUAL 3ST SOT363

74LVCH1T45GW,125

Manufacturer Part Number
74LVCH1T45GW,125
Description
TXRX XLATING DUAL 3ST SOT363
Manufacturer
NXP Semiconductors
Datasheet

Specifications of 74LVCH1T45GW,125

Logic Family
74LVCH
Number Of Channels Per Chip
2
Propagation Delay Time
29.5 ns
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.2 V
Maximum Operating Temperature
+ 125 C
Package / Case
SC-88
Maximum Power Dissipation
250 mW
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-5494-2
NXP Semiconductors
5. Functional diagram
6. Pinning information
Table 3.
74LVC_LVCH1T45
Product data sheet
Symbol
V
GND
A
B
DIR
V
Fig 1.
Fig 3.
CC(A)
CC(B)
V
CC(A)
GND
A
Logic symbol
(SC-88)
Pin configuration SOT363
DIR
Pin description
1
2
3
A
74LVCH1T45
74LVC1T45
5
3
6.1 Pinning
6.2 Pin description
001aaj991
Pin
1
2
3
4
5
6
V
CC(A)
6
5
4
V
DIR
B
CC(B)
V
CC(B)
All information provided in this document is subject to legal disclaimers.
Fig 4.
001aag885
4
V
B
CC(A)
GND
Rev. 3 — 19 August 2010
Pin configuration SOT886
(XSON6)
A
Transparent top view
74LVCH1T45
74LVC1T45
1
2
3
Description
supply voltage port A and DIR
ground (0 V)
data input or output
data input or output
direction control
supply voltage port B
Fig 2.
74LVC1T45; 74LVCH1T45
001aaj992
6
5
4
V
DIR
B
CC(B)
Logic diagram
Dual supply translating transceiver; 3-state
DIR
A
V
Fig 5.
CC(A)
V
CC(A)
GND
Pin configuration SOT891,
SOT1115 and SOT1202
A
Transparent top view
74LVCH1T45
74LVC1T45
V
1
2
3
CC(B)
001aag886
© NXP B.V. 2010. All rights reserved.
001aaj993
6
5
4
B
V
DIR
B
CC(B)
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