STM32W108B-SK STMicroelectronics, STM32W108B-SK Datasheet - Page 118

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STM32W108B-SK

Manufacturer Part Number
STM32W108B-SK
Description
STARTER KIT FOR STM32W108
Manufacturer
STMicroelectronics
Series
STM32r
Type
MCUr

Specifications of STM32W108B-SK

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STM32 Cortex-M3 Companion Products
Contents
Board
Silicon Manufacturer
ST Micro
Core Architecture
ARM
Core Sub-architecture
Cortex - M3
Silicon Core Number
STM32
Silicon Family Name
STM32W108xx
Kit Contents
Board
Features
IEEE
Mfg Application Notes
STM32W108 Adjacent Channel Rejection Measurements
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
*
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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General-purpose timers
10.1.4
118/209
Figure 29. Control circuit in external clock mode 2
Capture/compare channels
Each capture/compare channel is built around a capture/compare register including a
shadow register, an input stage for capture with digital filter, multiplexing and prescaler, and
an output stage with comparator and output control.
Figure 30
corresponding TIy input to generate a filtered signal (TIyF). Then an edge detector with
polarity selection generates a signal (TIyFPy) which can be used either as trigger input by
the slave mode controller or as the capture command. It is prescaled before the capture
register (ICyPS).
Figure 30. Capture/compare channel (example: channel 1 input stage)
The output stage generates an intermediate reference signal, OCyREF, which is only used
internally. OCyREF is always active high, but it may be inverted to create the output signal,
OCy, that controls a GPIO output.
gives an overview of one capture/compare channel. The input stage samples the
Doc ID 16252 Rev 8
STM32W108CB, STM32W108HB

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