STM32W108B-SK STMicroelectronics, STM32W108B-SK Datasheet - Page 90

• Manufacturer Part Number: STM32W108B-SK
• Description: STARTER KIT FOR STM32W108
• Manufacturer: STMicroelectronics
• Series: STM32r
• Type: MCUr

Specifications of STM32W108B-SK

• Featured Product: STM32 Cortex-M3 Companion Products
• Contents: Board
• Silicon Manufacturer: ST Micro
• Core Architecture: ARM
• Core Sub-architecture: Cortex - M3
• Silicon Core Number: STM32
• Silicon Family Name: STM32W108xx
• Kit Contents: Board
• Features: IEEE
• Mfg Application Notes: STM32W108 Adjacent Channel Rejection Measurements
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: *
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Serial interfaces
9.8.2
9.8.3
90/209
Reser
Reser
ved
ved
31
15
31
15
INT_S
RERR
INT_S
RERR
C1PA
C1PA
30
14
rw
30
14
rw
Bit 14 INT_SC1PARERR: Parity error received (UART) interrupt pending.
Bit 13 INT_SC1FRMERR: Frame error received (UART) interrupt pending.
Bit 12 INT_SCTXULDB: DMA transmit buffer B unloaded interrupt pending.
Bit 11 INT_SCTXULDA: DMA transmit buffer A unloaded interrupt pending.
Bit 10 INT_SCRXULDB: DMA receive buffer B unloaded interrupt pending.
Serial controller interrupt flag register (INT_SCxFLAG)
Address offset: 0xA808 (INT_SC1FLAG) and 0xA80C (INT_SC2FLAG)
Reset value:
Serial controller interrupt configuration register (INT_SCxCFG)
Address offset: 0xA848 (INT_SC1CFG) and 0xA84C (INT_SC2CFG)
Reset value:
MERR
MERR
INT_S
INT_S
C1FR
Bit 9 INT_SCRXULDA: DMA receive buffer A unloaded interrupt pending.
Bit 8 INT_SCNAK: NACK received (I
Bit 7 INT_SCCMDFIN: START/STOP command complete (I
Bit 6 INT_SCTXFIN: Transmit operation complete (I
Bit 5 INT_SCRXFIN: Receive operation complete (I
Bit 4 INT_SCTXUND: Transmit buffer underrun interrupt pending.
Bit 3 INT_SCRXOVF: Receive buffer overrun interrupt pending.
Bit 2 INT_SCTXIDLE: Transmitter idle interrupt pending.
Bit 1 INT_SCTXFREE: Transmit buffer free interrupt pending.
Bit 0 INT_SCRXVAL: Receive buffer has data interrupt pending.
C1FR
29
13
rw
29
13
rw
INT_S
CTXU
INT_S
CTXU
LDB
LDB
28
12
28
12
rw
rw
INT_S
INT_S
CTXU
CTXU
LDA
LDA
27
11
27
11
rw
rw
0x0000 0000
0x0000 0000
INT_S
CRXU
INT_S
CRXU
LDB
LDB
26
10
26
10
rw
rw
INT_S
CRXU
INT_S
CRXU
LDA
LDA
25
25
rw
rw
9
9
Doc ID 16252 Rev 8
INT_S
CNAK
INT_S
CNAK
24
24
rw
2
rw
8
8
C) interrupt pending.
Reserved
Reserved
CCMD
CCMD
INT_S
INT_S
FIN
FIN
23
rw
23
rw
7
7
CTXFI
CTXFI
INT_S
INT_S
22
22
rw
2
rw
2
N
N
6
6
C) interrupt pending.
C) interrupt pending.
INT_SC
INT_SC
RXFIN
RXFIN
21
rw
21
rw
5
5
2
C) interrupt pending.
STM32W108CB, STM32W108HB
INT_S
INT_S
CTXU
CTXU
ND
ND
20
rw
20
rw
4
4
INT_S
CRXO
INT_S
CRXO
VF
VF
19
rw
19
rw
3
3
CTXID
CTXID
INT_S
INT_S
18
LE
18
LE
rw
rw
2
2
CTXFR
CTXFR
INT_S
INT_S
EE
EE
17
17
rw
rw
1
1
CRXVA
CRXVA
INT_S
INT_S
16
rw
16
rw
0
L
0
L