LIS302DLH STMicroelectronics, LIS302DLH Datasheet - Page 25

• Manufacturer Part Number: LIS302DLH
• Description: SENSOR ACCELEROMETER 3AXIS 14LGA
• Manufacturer: STMicroelectronics

Specifications of LIS302DLH

• Featured Product: STM32 Cortex-M3 Companion Products
• Axis: X, Y, Z
• Acceleration Range: ±2.3g, 9.2g
• Sensitivity: 18mg/digit, 72mg/digit
• Voltage - Supply: 2.16 V ~ 3.6 V
• Output Type: Digital
• Bandwidth: 100Hz ~ 400Hz Selectable
• Interface: I²C, SPI
• Mounting Type: Surface Mount
• Package / Case: 14-LGA
• Package Type: LGA
• Operating Supply Voltage (min): 2.16V
• Operating Supply Voltage (typ): 2.5V
• Operating Supply Voltage (max): 3.6V
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Product Depth (mm): 3mm
• Product Height (mm): 0.92mm
• Product Length (mm): 5mm
• Mounting: Surface Mount
• Pin Count: 14
• Sensing Axis: Triple
• Acceleration: 2 g, 4 g, 8 g
• Digital Output - Number Of Bits: 16 bit
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 2.16 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Digital Output - Bus Interface: I2C, SPI
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-10052

LIS302DLH
7.3
data in the low-power modes are computed with low-pass filter cut-off frequency defined by
DR1, DR0 bits.
DR bits, in the normal-mode operation, select the data rate at which acceleration samples
are produced. In low-power mode they define the output data resolution.
the possible configuration for DR1 and DR0 bits.
Table 19.
Table 20.
CTRL_REG2 (21h)
Table 21.
Table 22.
BOOT
HPM1, HPM0
FDS
BOOT
PM2
0
0
0
0
1
1
1
DR1
0
0
1
1
Power mode and low-power output data rate configurations
Normal-mode output data rate configurations and low-pass cut-off
frequencies
CTRL_REG2 register
CTRL_REG2 description
HPM1
PM1
Reboot memory content. Default value: 0
(0: normal mode; 1: reboot memory content)
High pass filter mode selection. Default value: 00
(00: normal mode; Others: refer to
Filtered data selection. Default value: 0
(0: internal filter bypassed; 1: data from internal filter sent to output register)
0
0
1
1
0
0
1
DR0
0
1
0
1
HPM0
PM0
0
1
0
1
0
1
0
Doc ID 15797 Rev 1
Output Data Rate [Hz]
FDS
Power mode selection
ODR
1000
100
400
Normal mode
Power-down
50
Low-power
Low-power
Low-power
Low-power
Low-power
HPen2
Table
23)
HPen1
Low-pass filter cut-off
Output data rate [Hz]
frequency [Hz]
Register description
HPCF1
Table 20
ODR
292
780
37
74
ODR
0.5
10
--
1
2
5
LP
shows all
HPCF0
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