LPC2468FBD208 NXP Semiconductors, LPC2468FBD208 Datasheet - Page 57

IC, 32BIT MCU, ARM7, 72MHZ, LQFP-208

LPC2468FBD208

Manufacturer Part Number
LPC2468FBD208
Description
IC, 32BIT MCU, ARM7, 72MHZ, LQFP-208
Manufacturer
NXP Semiconductors
Datasheet

Specifications of LPC2468FBD208

Controller Family/series
(ARM7)
No. Of I/o's
160
Ram Memory Size
98KB
Cpu Speed
72MHz
No. Of Timers
4
No. Of Pwm Channels
12
Core Size
32 Bit
Program Memory Size
512KB
Rohs Compliant
Yes
Oscillator Type
External, Internal
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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0
NXP Semiconductors
Table 10.
T
[1]
[2]
Table 11.
T
[1]
Table 12.
C
[1]
LPC2468
Product data sheet
Symbol
f
f
Symbol
t
t
Symbol
t
t
t
V
t
t
t
t
t
t
osc(RC)
i(RTC)
r
f
r
f
FRFM
FEOPT
FDEOP
JR1
JR2
EOPR1
EOPR2
amb
amb
L
CRS
= 50 pF; R
Parameters are valid over operating temperature range unless otherwise specified.
Typical ratings are not guaranteed. The values listed are at room temperature (25 °C), nominal supply voltages.
Applies to standard I/O pins and RESET pin.
Characterized but not implemented as production test. Guaranteed by design.
=
=
40
40
°
°
Dynamic characteristic: internal oscillators
Dynamic characteristic: I/O pins
Dynamic characteristics of USB pins
C to +85
C to +85
pu
= 1.5 k
11.1 Internal oscillators
11.2 I/O pins
11.3 USB interface
Parameter
internal RC oscillator frequency
RTC input frequency
Parameter
rise time
fall time
differential rise and fall time
matching
output signal crossover voltage
source SE0 interval of EOP
source jitter for differential transition
to SE0 transition
receiver jitter to next transition
receiver jitter for paired transitions
EOP width at receiver
EOP width at receiver
Parameter
rise time
fall time
°
°
C; 3.0 V
C; V
Ω
on D+ to V
DD(3V3)
V
over specified ranges.
DD(3V3)
DD(3V3)
Conditions
pin configured as output
pin configured as output
All information provided in this document is subject to legal disclaimers.
,unless otherwise specified.
3.6 V.
[1]
Rev. 5 — 15 October 2010
[1]
Conditions
-
-
Conditions
10 % to 90 %
10 % to 90 %
see
see
10 % to 90 %
must reject as
EOP; see
Figure 16
must accept as
EOP; see
Figure 16
t
r
/ t
f
Figure 16
Figure 16
Min
3.0
2.5
Min
3.96
-
[1]
[1]
Min
7.7
-
1.3
160
−2
−18.5
−9
40
82
8.5
Single-chip 16-bit/32-bit micro
Typ
-
-
Typ
-
-
-
-
-
-
-
-
-
-
Typ
4.02
32.768
[2]
LPC2468
© NXP B.V. 2010. All rights reserved.
Max
5.0
5.0
Max
13.8
13.7
109
2.0
175
+5
+18.5
+9
-
-
Max
4.04
-
Unit
ns
ns
MHz
Unit
ns
ns
%
V
ns
ns
ns
ns
ns
ns
57 of 85
Unit
kHz

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