PIC16F1827-I/MQ Microchip Technology, PIC16F1827-I/MQ Datasheet - Page 120

• Manufacturer Part Number: PIC16F1827-I/MQ
• Description: IC, 8BIT MCU, PIC16F, 32MHZ, QFN-28
• Manufacturer: Microchip Technology

Specifications of PIC16F1827-I/MQ

• Controller Family/series: PIC16F
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 384Byte
• Cpu Speed: 32MHz
• No. Of Timers: 5
• Interface: EUSART, I2C, SPI
• Core Size: 8 Bit
• Program Memory Size: 4 Kwords
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Data Ram Size: 384 B
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 15
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: QFN EP
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Lead Free Status / Rohs Status: Details

PIC16F/LF1826/27
REGISTER 12-4:
REGISTER 12-5:
DS41391B-page 120
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7-6
bit 5
bit 4-0
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7-6
bit 5
bit 4-0
Note 1:
R/W-1/1
TRISA7
R/W-x/u
LATA7
Writes to PORTA are actually written to corresponding LATA register. Reads from PORTA register is return
of actual I/O pin values.
TRISA<7:6>: PORTA Tri-State Control bit
1 = PORTA pin configured as an input (tri-stated)
0 = PORTA pin configured as an output
TRISA5: RA5 Port Tri-State Control bit
This bit is always ‘1’ as RA5 is an input only
TRISA<4:0>: PORTA Tri-State Control bit
1 = PORTA pin configured as an input (tri-stated)
0 = PORTA pin configured as an output
LATA<7:6>: RA<7:6> Output Latch Value bits
Unimplemented: Read as ‘0
LATA<4:0>: RA<4:0> Output Latch Value bits
R/W-1/1
TRISA6
R/W-x/u
LATA6
TRISA: PORTA TRI-STATE REGISTER
LATA: PORTA DATA LATCH REGISTER
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
TRISA5
R-1/1
U-0
—
R/W-1/1
TRISA4
R/W-x/u
LATA4
Preliminary
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
R/W-1/1
R/W-x/u
TRISA3
(1)
(1)
LATA3
R/W-1/1
R/W-x/u
TRISA2
LATA2
© 2009 Microchip Technology Inc.
R/W-1/1
R/W-x/u
TRISA1
LATA1
R/W-1/1
TRISA0
R/W-x/u
LATA0
bit 0
bit 0