LPC2119FBD64 NXP Semiconductors, LPC2119FBD64 Datasheet - Page 11

16/32BIT MCU ARM7, 128K FLASH, 64LQFP

LPC2119FBD64

Manufacturer Part Number
LPC2119FBD64
Description
16/32BIT MCU ARM7, 128K FLASH, 64LQFP
Manufacturer
NXP Semiconductors
Datasheet

Specifications of LPC2119FBD64

No. Of I/o's
46
Ram Memory Size
16KB
Cpu Speed
60MHz
No. Of Timers
2
No. Of Pwm Channels
6
Digital Ic Case
RoHS Compliant
Core Size
32bit
Program Memory Size
128KB
Oscillator Type
External Only
Controller Family/series
LPC21xx
Rohs Compliant
Yes
Data Bus Width
16 bit, 32 bit
Program Memory Type
Flash
Data Ram Size
16 KB
Interface Type
CAN, I2C, JTAG, SPI, SSP, UART
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
46
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
LQFP
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 4 Channel
Lead Free Status / Rohs Status
 Details

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Product data sheet
LPC2109_2119_2129_6
6.3 On-chip static RAM
6.4 Memory map
However, the ISP flash erase command can be executed at any time (no matter whether
the CRP is on or off). Removal of CRP is achieved by erasure of full on-chip user flash.
With the CRP off, full access to the chip via the JTAG and/or ISP is restored.
On-chip static RAM may be used for code and/or data storage. The SRAM may be
accessed as 8 bit, 16 bit, and 32 bit. The LPC2109/2119/2129 provide 8 kB of static RAM
for the LPC2109 and 16 kB for the LPC2119 and LPC2129.
The LPC2109/2119/2129 memory maps incorporate several distinct regions, as shown in
Figure
In addition, the CPU interrupt vectors may be re-mapped to allow them to reside in either
flash memory (the default) or on-chip static RAM. This is described in
“System
3.
control”.
Rev. 06 — 10 December 2007
LPC2109/2119/2129
Single-chip 16/32-bit microcontrollers
Section 6.18
© NXP B.V. 2007. All rights reserved.
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