P89LPC915HDH NXP Semiconductors, P89LPC915HDH Datasheet - Page 56
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P89LPC915HDH
Manufacturer Part Number
P89LPC915HDH
Description
MCU 8BIT 80C51 2K FLASH, TSSOP14
Manufacturer
NXP Semiconductors
Datasheet
1.P89LPC916FDH118.pdf
(75 pages)
Specifications of P89LPC915HDH
Controller Family/series
(8051) 8052
Core Size
8bit
No. Of I/o's
14
Program Memory Size
2KB
Ram Memory Size
256Byte
Cpu Speed
18MHz
Oscillator Type
Internal Only
No. Of Timers
4
Digital Ic
RoHS Compliant
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NXP Semiconductors
P89LPC915_916_917_5
Product data sheet
9.7 DAC output to a port pin with high output impedance
9.8 Clock divider
9.9 Power-down and Idle mode
The A/D converter’s DAC block can be output to a port pin. In this mode, the AD1DAT3
register is used to hold the value fed to the DAC. After a value has been written to the DAC
(written to AD1DAT3), the DAC output will appear on the channel 3 pin.
The A/D converter requires that its internal clock source be in the range of 500 kHz to
3.3 MHz to maintain accuracy. A programmable clock divider that divides the clock
from 1 to 8 is provided for this purpose.
In Idle mode the A/C converter, if enabled, will continue to function and can cause the
device to exit Idle mode when the conversion is completed if the A/D interrupt is enabled.
In Power-down mode or Total Power-down mode, the A/D does not function. If the A/D is
enabled, it will consume power. Power can be reduced by disabling the A/D.
Rev. 05 — 15 December 2009
8-bit microcontrollers with accelerated two-clock 80C51 core
P89LPC915/916/917
© NXP B.V. 2009. All rights reserved.
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