PIC16F946T-I/PT Microchip Technology, PIC16F946T-I/PT Datasheet - Page 74

• Manufacturer Part Number: PIC16F946T-I/PT
• Description: Microcontroller
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F946T-I/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 14KB (8K x 14)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 336 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MA160011 - DAUGHTER BOARD PICDEM LCD 16F91X
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIC16F946
REGISTER 4-1:
DS41265A-page 72
bit 7
bit 6-4
bit 3
bit 2
bit 1
bit 0
OSCCON – OSCILLATOR CONTROL REGISTER (ADDRESS: 8Fh)
Unimplemented: Read as ‘0’
IRCF<2:0>: Internal Oscillator Frequency Select bits
000 =
001 =
010 =
011 =
100 =
101 =
110 =
111 =
OSTS: Oscillator Start-up Time-out Status bit
1 = Device is running from the external system clock defined by FOSC<2:0>
0 = Device is running from the internal system clock (HFINTOSC or LFINTOSC)
HTS: HFINTOSC (High Frequency – 8 MHz to 125 kHz) Status bit
1 = HFINTOSC is stable
0 = HFINTOSC is not stable
LTS: LFINTOSC (Low Frequency – 31 kHz) Stable bit
1 = LFINTOSC is stable
0 = LFINTOSC is not stable
SCS: System Clock Select bit
1 = Internal oscillator is used for system clock
0 = Clock source defined by FOSC<2:0>
bit 7
Legend:
R = Readable bit
- n = Value at POR
q = value depends on condition
Note 1: The value of the OSTS bit on device power-up is dependent on the value of the
U-0
—
31 kHz
125 kHz
250 kHz
500 kHz
1 MHz
2 MHz
4 MHz
8 MHz
Configuration Word (CONFIG) of the device. The value of the OSTS bit will be ‘0’
on a device Power-on Reset (POR) or any automatic clock switch, which may occur
from Two-Speed Start-up or Fail-Safe Clock Monitor, if the following conditions are
true:
OSTS = 0 if:
FOSC<2:0> = 000 (LP) or 001 (XT) or 010 (HS)
and
IESO = 1 or FSCM = 1
(IESO will be enabled automatically if FSCM is enabled)
If any of the above conditions are not met, the value of the OSTS bit will be ‘1’ on
a device POR. See Section 4.6 “Two-Speed Clock Start-up Mode” and
Section 4.7 “Fail-Safe Clock Monitor” for more details.
R/W-1
IRCF2
R/W-1
IRCF1
Preliminary
W = Writable bit
‘1’ = Bit is set
R/W-0
IRCF0
OSTS
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R-q
(1)
HTS
R-0
© 2005 Microchip Technology Inc.
x = Bit is unknown
LTS
R-0
R/W-0
SCS
bit 0