PIC18F2221-E/SS Microchip Technology, PIC18F2221-E/SS Datasheet - Page 387

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PIC18F2221-E/SS

Manufacturer Part Number
PIC18F2221-E/SS
Description
4KB, Flash, 512bytes-RAM, 25I/O, 8-bit Family,nanoWatt 28 SSOP .209in TUBE
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F2221-E/SS

Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
APPENDIX C:
This appendix discusses the considerations for
converting from previous versions of a device to the
ones listed in this data sheet. Typically, these changes
are due to the differences in the process technology
used. An example of this type of conversion is from a
PIC16C74A to a PIC16C74B.
The PIC18F2221/2321/4221/4321 family of devices is
functionally the same as the PIC18F4320 family. Code
written for a PIC18F4320 will generally work on a
PIC18F4321 with few or no changes.
The following is a list of changes the user should be
aware of when migrating an application from the
PIC18F4320 to the PIC18F4321. Code written for the
PIC18F4321 may not run as expected due to these
differences.
1.
2.
3.
4.
© 2009 Microchip Technology Inc.
Entry to power-managed modes has changed.
Modifying the SCS1:SCS0 bits (OSCCON<1:0>)
immediately changes the current clock source. It
is not necessary to execute a SLEEP instruction
to change clock sources. Refer to Section 4.1.2
“Entering Power-Managed Modes” for details.
Exit from power-managed modes has changed.
A WDT wake or interrupt does not cause an
automatic return to PRI_RUN mode. The
controller will execute code while continuing to
use the current clock source. If the controller
was operating in RC_IDLE or RC_RUN mode,
an interrupt will cause entry to RC_RUN mode
until code selects another power-managed
mode. Refer to Section 4.4 “Idle Modes” for
details.
The extended instruction set can be con-
figured as enabled using the XINST bit
(CONFIG4L<6>). The access memory map is
also modified when the extended instruction set
is enabled. Refer to Section 6.5 “Data Memory
and the Extended Instruction Set” and
Section 24.2 “Extended Instruction Set” for
details.
There may also be changes to the electrical spec-
ifications. Refer to Section 27.0 “Electrical
Characteristics” for details.
CONVERSION
CONSIDERATIONS
PIC18F2221/2321/4221/4321 FAMILY
APPENDIX D:
This section discusses how to migrate from a Baseline
device (i.e., PIC16C5X) to an Enhanced MCU device
(i.e., PIC18FXXX).
The following are the list of modifications over the
PIC16C5X microcontroller family:
Not Currently Available
MIGRATION FROM
BASELINE TO
ENHANCED DEVICES
DS39689F-page 387

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