S29AL004D70TFI010 Spansion Inc., S29AL004D70TFI010 Datasheet - Page 14

• Manufacturer Part Number: S29AL004D70TFI010
• Description: Flash Memory IC
• Manufacturer: Spansion Inc.

Specifications of S29AL004D70TFI010

• Memory Size: 4Mbit
• Memory Configuration: 512K X 8 / 256K X 16
• Ic Interface Type: Parallel
• Access Time: 70ns
• Memory Case Style: TSOP
• No. Of Pins: 48
• Operating Temperature Range: -40°C To +85°C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

12
Writing Commands/Command Sequences
Program and Erase Operation Status
Standby Mode
content occurs during the power transition. No command is necessary in this
mode to obtain array data. Standard microprocessor read cycles that assert valid
addresses on the device address inputs produce valid data on the device data
outputs. The device remains enabled for read access until the command register
contents are altered.
See
for timing specifications and to
in the DC Characteristics table represents the active current specification for
reading array data.
To write a command or command sequence (which includes programming data
to the device and erasing sectors of memory), the system must drive WE# and
CE# to V
For program operations, the BYTE# pin determines whether the device accepts
program data in bytes or words. Refer to
for more information.
The device features an Unlock Bypass mode to facilitate faster programming.
Once the device enters the Unlock Bypass mode, only two write cycles are re-
quired to program a word or byte, instead of four. The
Command Sequence‚ on page 19
using both standard and Unlock Bypass command sequences.
An erase operation can erase one sector, multiple sectors, or the entire device.
Table 2 on page 13
sector occupies. A sector address consists of the address bits required to uniquely
select a sector. The
sector or the entire chip, or suspending/resuming the erase operation.
After the system writes the autoselect command sequence, the device enters the
autoselect mode. The system can then read autoselect codes from the internal
register (which is separate from the memory array) on DQ7–DQ0. Standard read
cycle timings apply in this mode. Refer to the
I
the write mode. The
tables and timing diagrams for write operations.
During an erase or program operation, the system may check the status of the
operation by reading the status bits on DQ7–DQ0. Standard read cycle timings
and I
more information, and to
When the system is not reading or writing to the device, it can place the device
in the standby mode. In this mode, current consumption is greatly reduced, and
the outputs are placed in the high impedance state, independent of the OE#
input.
The device enters the CMOS standby mode when the CE# and RESET# pins are
both held at V
V
Autoselect Command Sequence‚ on page 19
CC2
IH
.) If CE# and RESET# are held at V
in the DC Characteristics table represents the active current specification for
Reading Array Data‚ on page 18
CC
read specifications apply. Refer to
IL
, and OE# to V
CC
± 0.3 V. (Note that this is a more restricted voltage range than
and
Command Definitions‚ on page 18
AC Characteristics‚ on page 37
Table on page 14
IH
AC Characteristics‚ on page 37
.
A d v a n c e
Figure 13, on page 37
has details on programming data to the device
S29AL004D
for more information. Refer to the AC table
IH
, but not within V
Write Operation Status‚ on page 26
Word/Byte Configuration‚ on page 11
indicate the address space that each
I n f o r m a t i o n
for more information.
Autoselect Mode‚ on page 14
contains timing specification
for the timing diagram. I
has details on erasing a
for timing diagrams.
CC
Word/Byte Program
± 0.3 V, the device
S29AL004D_00_A1 February 18, 2005
and
CC1
for