EVAL-AD7986EBZ Analog Devices Inc, EVAL-AD7986EBZ Datasheet - Page 5

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EVAL-AD7986EBZ

Manufacturer Part Number
EVAL-AD7986EBZ
Description
18-Bit A/D Converter Eval. Board
Manufacturer
Analog Devices Inc
Series
PulSAR®r
Datasheet

Specifications of EVAL-AD7986EBZ

Silicon Manufacturer
Analog Devices
Application Sub Type
ADC
Kit Application Type
Data Converter
Silicon Core Number
AD7986
Kit Contents
Board
Number Of Adc's
1
Number Of Bits
18
Sampling Rate (per Second)
2M
Data Interface
Serial
Inputs Per Adc
1 Differential
Input Range
±VREF
Power (typ) @ Conditions
29mW @ 2MSPS
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
AD7986
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
TIMING SPECIFICATIONS
AVDD = DVDD = 2.5 V, BVDD = 5 V, VIO = 1.8 V to 2.7 V, V
Table 4.
Parameter
Conversion Time: CNV Rising Edge to Data Available (Turbo Mode/Normal Mode)
Acquisition Time
Time Between Conversions (Turbo Mode/Normal Mode)
CNV Pulse Width (CS Mode)
Data Read During Conversion (Turbo Mode/Normal Mode)
Quiet Time During Acquisition from Last SCK Falling Edge to CNV Rising Edge
SCK Period (CS Mode)
SCK Period (Chain Mode)
SCK Low Time
SCK High Time
SCK Falling Edge to Data Remains Valid
SCK Falling Edge to Data Valid Delay
CNV or SDI Low to SDO D17 MSB Valid (CS Mode)
CNV or SDI High or Last SCK Falling Edge to SDO High Impedance (CS Mode)
SDI Valid Setup Time from CNV Rising Edge
SDI Valid Hold Time from CNV Rising Edge (CS Mode)
SDI Valid Hold Time from CNV Rising Edge (Chain Mode)
SCK Valid Setup Time from CNV Rising Edge (Chain Mode)
SCK Valid Hold Time from CNV Rising Edge (Chain Mode)
SDI Valid Setup Time from SCK Falling Edge (Chain Mode)
SDI Valid Hold Time from SCK Falling Edge (Chain Mode)
SDI High to SDO High (Chain Mode with Busy Indicator)
1
See Figure 2 and Figure 3 for load conditions.
Figure 2. Load Circuit for Digital Interface Timing
TO SDO
20pF
C
L
500µA
500µA
I
I
OL
OH
1.4V
Rev. B | Page 5 of 28
REF
= 4.096 V, T
A
1
= −40°C to +85°C, unless otherwise noted.
MINIMUM V
SPECIFICATIONS IN TABLE 3.
90% VIO
t
DELAY
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
CONV
ACQ
CYC
CNVH
DATA
QUIET
SCK
SCK
SCKL
SCKH
HSDO
DSDO
EN
DIS
SSDICNV
HSDICNV
HSDICNV
SSCKCNV
HSCKCNV
SSDISCK
HSDISCK
DSDOSDI
IH
AND MAXIMUM V
Figure 3. Voltage Levels for Timing
V
V
IH
IL
1
1
Min
100
500/660
10
20
9
11
3.5
3.5
2
4
0
0
5
5
2
3
IL
USED. SEE DIGITAL INPUTS
Typ
10% VIO
t
DELAY
V
V
Max
400/500
200/300
6
10
8
5
IH
IL
1
1
1
AD7986
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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