HFBR-0573 Avago Technologies US Inc., HFBR-0573 Datasheet - Page 7

• Manufacturer Part Number: HFBR-0573
• Description: Fiber Optics, Evaluation Kit
• Manufacturer: Avago Technologies US Inc.

Specifications of HFBR-0573

• Silicon Core Number: HFBR-5601/5602, HFCT-5611/5612
• Features: One Fully Assembled GBIC Test Fixture And Literature
• Tool / Board Applications: Transceivers
• Main Purpose: Interface, Ethernet
• Embedded: No
• Utilized Ic / Part: HFBR-5601, HFBR-5602, HFCT-5611, HFCT-5612
• Primary Attributes: GBIC Gigabit Ethernet or Fibre Channel Applications
• Secondary Attributes: Hot Pluggable
• Description/function: Fiber Optic Kit
• Development Tool Type: Hardware / Software - Eval/Demo Board
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: HFBR-560x, HFCT-561x
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Contains lead / RoHS non-compliant

20-Pin SCA-2 Host Connector Characteristics
Table 1. SCA-2 Host connector pin assignment
Notes:
A sequence value of 1 indicates that the signal is in the first group to engage during plugging of a module. A sequence value of 2 indicates
*
Table 2. Signal Definition
Table 3. Module Definition
Defntn.
Note: All Avago Technologies GBIC modules comply with Module Definition 4 of the GBIC specification Rev 5.4
Pin
1
10
Pin
1
10
11
12
13
14
15
16
17
18
19
4
7
2
3
4
5
6
7
8
9
2
3
4
5
6
7
8
9
20
that the signal is the second and last group. The two guide pins integrated on the connector are connected to TGND. These two guide pins
make contact with circuit ground prior to Sequence 1 signals.
This pin is tied high via 10 K pull-up resistor.
MOD_DEF(0) Pin 4
TTL Low
Signal Name
RX_LOS
RGND
RGND
MOD_DEF(0)
MOD_DEF(1)
MOD_DEF(2)
RGND
-RX_DAT
+RX_DAT
RGND
+TX_DAT
-TX_DAT
TX_DISABLE
TGND
TGND
TX_FAULT
VDDR
VDDT
TGND
TGND
RX_LOS
RGND
RGND
MOD_DEF(0)
MOD_DEF(1)
MOD_DEF(2)
Name
TX_DISABLE*
TGND
TGND
TX_FAULT
MOD_DEF(1) Pin 5
SCL
Input/Output
Output
Output
Input
Input/Output
Input
Output
Output
Output
Input
Input
Input
Input
Sequence
2
2
2
2
2
2
2
2
2
2
Description
Receiver Loss of Signal, TTL High, open collector
Receiver Ground
Receiver Ground
SCL Serial Clock Signal
SDA Serial Data Signal
Receiver Ground
Received Data, Differential PECL, ac coupled
Received Data, Differential PECL, ac coupled
Receiver Ground
Receiver +5 V supply
TTL Low
Transmit Disable
Transmitter Ground
Transmitter Ground
Transmit Fault
Transmitter +5 V supply
Transmitter Ground
Transmit Data, Differential PECL, ac coupled
Transmit Data, Differential PECL, ac coupled
Transmitter Ground
MOD_DEF(2) Pin 6
SDA
Pin
11
12
13
14
15
16
17
18
19
20
Name
RGND
RGND
-RX_DAT
+RX_DAT
VDDR
VDDT
TGND
+TX_DAT
-TX_DAT
TGND
Interpretation by host
Serial module definition protocol
1
1
1
1
1
1
1
1
Sequence
2
2