CDK5560 Cirrus Logic Inc, CDK5560 Datasheet - Page 9

KIT - CDB5560 W/ Capture Plus II System

CDK5560

Manufacturer Part Number
CDK5560
Description
KIT - CDB5560 W/ Capture Plus II System
Manufacturer
Cirrus Logic Inc
Series
CapturePLUS™IIr
Datasheets

Specifications of CDK5560

Number Of Adc's
1
Number Of Bits
24
Sampling Rate (per Second)
50k
Data Interface
Serial
Inputs Per Adc
1 Differential
Input Range
±3 V
Power (typ) @ Conditions
90mW @ 2.5 V
Voltage Supply Source
Dual ±
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
CS5560
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
598-1277
CDK5560-1
SWITCHING CHARACTERISTICS
T
VL - VLR = 3.3 V, ±5%, 2.5 V, ±5%, or 1.8 V, ±5%
Input levels: Logic 0 = 0V = Low; Logic 1 = VD+ = High; CL = 15 pF.
DS713PP2
SCLK(i)
Serial Port Timing in SEC Mode (SMODE = VLR)
SCLK(in) Pulse Width (High)
SCLK(in) Pulse Width (Low)
CS hold time (high) after RDY falling
CS hold time (high) after SCLK rising
CS low to SDO out of Hi-Z
Data hold time after SCLK rising
Data setup time before SCLK rising
CS hold time (low) after SCLK rising
RDY rising after SCLK falling
A
MCLK
= -40 to +85 °C; V1+ = V2+ = +2.5 V, ±5%; V1- = V2- = -2.5 V, ±5%;
SDO
RDY
CS
14. SDO will be high impedance when CS is high. In some systems it may require a pull-down resistor.
Figure 3. SEC Mode - Continuous SCLK Read Timing (Not to Scale)
Parameter
t
17
t
t
MSB
16
15
t
18
t
19
(CONTINUED)
5/4/09
(Note 14)
Symbol
t
t
t
t
t
t
t
15
16
17
18
19
20
21
-
-
Min
30
30
10
10
10
10
-
-
-
LSB
t
20
Typ
10
10
10
-
-
-
-
-
-
t
21
SCLK
Max
1
-
-
-
-
-
-
-
-
CS5560
10
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
9

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