HSC-ADC-FPGA-9289 Analog Devices Inc, HSC-ADC-FPGA-9289 Datasheet - Page 3

• Manufacturer Part Number: HSC-ADC-FPGA-9289
• Description: EVAL BOARD FPGA FOR AD9289
• Manufacturer: Analog Devices Inc

Specifications of HSC-ADC-FPGA-9289

• Accessory Type: ADC Interface Board
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: AD9289 (Requires HSC-ADC-EVAL-DC)

HSDB QUICK START
The HSDB is used to create an interface from a quad/octal ADC
evaluation board that has serial LVDS outputs to the FIFO
data capture board.
REQUIREMENTS
The following equipment is needed to set up the HSDB:
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ADDITIONAL INFORMATION AND UPDATES
For more information on the ADC Analyzer and the FIFO
data capture board, and for software updates, visit
www.analog.com/FIFO.
For more information on LVDS data output, see the LVDS Data
Outputs for High Speed Analog-to-Digital Converters Application
Note (AN-586) on
FIFO evaluation board, ADC Analyzer, USB cable, and
FIFO data sheet
High speed ADC evaluation board and ADC data sheet
Power supply for ADC evaluation board, HSDB, and FIFO
Analog signal source and appropriate filtering
Low jitter clock source applicable for specific ADC
evaluation, typically <1 ps rms
PC with Windows® 98 (2
Windows ME, or Windows XP for the ADC Analyzer
PC with a USB 2.0 port recommended for FIFO
connection
www.analog.com.
nd
edition), Windows 2000,
Rev. C | Page 3 of 20
QUICK START STEPS
Connect the quad/octal ADC evaluation board to the high
speed backplane connector side of the HSDB. Then connect the
other side of the HSDB to the 120-pin connector header that
mates to the FIFO board.
1.
2.
3.
4.
5.
6.
Connect the USB cable to the FIFO evaluation board and
to a USB port on the PC.
Set the FIFO jumper settings in dual-channel configuration
as shown in the HSC-ADC-EVALA/B-DC data sheet,
located at www.analog.com/FIFO.
Verify and connect the appropriate power supplies to the
FIFO, HSDB, and ADC evaluation boards.
Apply power to the evaluation boards and check the
voltage levels at the board level. Separate supplies may be
necessary.
Connect the appropriate analog input (which should be
filtered with a band-pass filter) and low jitter clock signal.
Start the ADC Analyzer to begin the evaluation.
HSC-ADC-FPGA