AD5522JSVUZ Analog Devices Inc, AD5522JSVUZ Datasheet - Page 17

• Manufacturer Part Number: AD5522JSVUZ
• Description: Quad PPMU With DACs And LVDS/SPI
• Manufacturer: Analog Devices Inc

Specifications of AD5522JSVUZ

• Design Resources: Parametric Measurement Unit and Supporting Components for PAD Appls Using AD5522 and AD7685 (CN0104)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Pin No.
13
14
15
16
17
18
19
21
22, 39, 62,
67, 79
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
40
42
43
44
45
46
47
48
Mnemonic
GUARDIN2/
DUTGND2
GUARD2
FOH2
EXTMEASIL2
EXTMEASIH2
CCOMP2
CFF2
EXTFOH2
AVSS
BUSY
SCLK
CPOL0/SCLK
CPOH0/SDI
SDI
SYNC
CPOL1/SYNC
DGND
CPOH1/SDO
SDO
LOAD
DVCC
CPOL2/CPO0
CPOH2/CPO1
CPOL3/CPO2
CPOH3/CPO3
EXTFOH3
CFF3
CCOMP3
EXTMEASIH3
EXTMEASIL3
FOH3
GUARD3
GUARDIN3/
DUTGND3
Description
Guard Amplifier Input for Channel 2/DUTGND Input for Channel 2. This dual function pin is configured via the
serial interface. The default function at power-on is GUARDIN2. If this pin is configured as a DUTGND input for
the channel, the input to the guard amplifier is internally connected to MEASVH2. For more information, see
the Device Under Test Ground (DUTGND) section and the Guard Amplifier section.
Guard Output Drive for Channel 2.
Force Output for Internal Current Ranges (Channel 2).
Sense Input (Low Sense) for High Current Range (Channel 2).
Sense Input (High Sense) for High Current Range (Channel 2).
Compensation Capacitor Input for Channel 2. See the Compensation Capacitors section.
External Capacitor for Channel 2. This pin optimizes the stability and settling time performance of the force
amplifier when in force voltage mode. See the Compensation Capacitors section.
Force Output for High Current Range (Channel 2). Use an external resistor at this pin for current ranges up to
±80 mA. For more information, see the Current Range Selection section.
Negative Analog Supply Voltage.
Digital Input/Open-Drain Output. This pin indicates the status of the interface. See the BUSY and LOAD
Functions section for more information.
Serial Clock Input, Active Falling Edge. Data is clocked into the shift register on the falling edge of SCLK. This
pin operates at clock speeds up to 50 MHz.
Comparator Output Low (Channel 0) for SPI Interface/Differential Serial Clock Input (Complement) for LVDS
Interface.
Comparator Output High (Channel 0) for SPI Interface/Differential Serial Data Input (Complement) for LVDS
Interface.
Serial Data Input for SPI or LVDS Interface.
Active Low Frame Synchronization Input for SPI or LVDS Interface.
Comparator Output Low (Channel 1) for SPI Interface/Differential SYNC Input for LVDS Interface.
Digital Ground Reference Point.
Comparator Output High (Channel 1) for SPI Interface/Differential Serial Data Output (Complement) for LVDS
Interface.
Serial Data Output for SPI or LVDS Interface. This pin can be used for data readback and diagnostic purposes.
Logic Input (Active Low). This pin synchronizes updates within one device or across a group of devices. If
synchronization is not required, LOAD can be tied low; in this case, DAC channels and PMU modes are updated
immediately after BUSY goes high. See the BUSY and LOAD Functions section for more information.
Digital Supply Voltage.
Comparator Output Low (Channel 2) for SPI Interface/Comparator Output Window (Channel 0) for LVDS
Interface.
Comparator Output High (Channel 2) for SPI Interface/Comparator Output Window (Channel 1) for LVDS
Interface.
Comparator Output Low (Channel 3) for SPI Interface/Comparator Output Window (Channel 2) for LVDS
Interface.
Comparator Output High (Channel 3) for SPI Interface/Comparator Output Window (Channel 3) for LVDS
Interface.
Force Output for High Current Range (Channel 3). Use an external resistor at this pin for current ranges up to
±80 mA. For more information, see the Current Range Selection section.
External Capacitor for Channel 3. This pin optimizes the stability and settling time performance of the force
amplifier when in force voltage mode. See the Compensation Capacitors section.
Compensation Capacitor Input for Channel 3. See the Compensation Capacitors section.
Sense Input (High Sense) for High Current Range (Channel 3).
Sense Input (Low Sense) for High Current Range (Channel 3).
Force Output for Internal Current Ranges (Channel 3).
Guard Output Drive for Channel 3.
Guard Amplifier Input for Channel 3/DUTGND Input for Channel 3. This dual function pin is configured via the
serial interface. The default function at power-on is GUARDIN3. If this pin is configured as a DUTGND input for
the channel, the input to the guard amplifier is internally connected to MEASVH3. For more information, see
the Device Under Test Ground (DUTGND) section and the Guard Amplifier section.
Rev. D | Page 17 of 64
AD5522