AD5522JSVUZ Analog Devices Inc, AD5522JSVUZ Datasheet - Page 56

• Manufacturer Part Number: AD5522JSVUZ
• Description: Quad PPMU With DACs And LVDS/SPI
• Manufacturer: Analog Devices Inc

Specifications of AD5522JSVUZ

• Design Resources: Parametric Measurement Unit and Supporting Components for PAD Appls Using AD5522 and AD7685 (CN0104)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD5522
READBACK OF COMPARATOR STATUS REGISTER
The comparator status register is a read-only register that
provides access to the output status of each comparator pin on
the chip. Table 33 shows the format of the comparator register
readback word.
Table 33. Comparator Status Register (Read-Only)
Bit
23 (MSB)
22
Comparator Status Register-Specific Bits
21
20
19
18
17
16
15
14
13 to 0 (LSB)
Table 34. Alarm Status Register Readback
Bit
23 (MSB)
22
Alarm Status Register-Specific Bits
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3 to 0 (LSB)
MODE1
Bit Name
MODE0
CPOL0
CPOH0
CPOL1
CPOH1
CPOL2
CPOH2
CPOL3
CPOH3
Unused
readback bits
Bit Name
MODE1
MODE0
LTMPALM
TMPALM
LG0
G0
LG1
G1
LG2
G2
LG3
G3
LC0
C0
LC1
C1
LC2
C2
LC3
C3
Unused
readback bits
Description
1
1
TMPALM corresponds to the open-drain TMPALM output pin that flags a temperature event
exceeding the default or user programmed level. The temperature alarm is a per-device alarm; the
latched (LTMPALM) and unlatched (TMPALM) bits indicate whether a temperature event occurred
and whether the alarm still exists (that is, whether the junction temperature still exceeds the
programmed alarm level). To reset an alarm event, the user must write a 1 to the clear bit (Bit 6)
in the PMU register.
LGx is the per-channel latched guard alarm bit, and Gx is the unlatched guard alarm bit. These bits
indicate which channel flagged the alarm on the open-drain alarm pin, CGALM, and whether the
alarm condition still exists.
LCx is the per-channel latched clamp alarm bit, and Cx is the unlatched clamp alarm bit. These bits
indicate which channel flagged the alarm on the open-drain alarm pin CGALM and whether the
alarm condition still exists.
Loads with 0s.
Description
0
1
Comparator output conditions per channel corresponding to the comparator output pins.
1 = PMU comparator output is high.
0 = PMU comparator output is low.
Loads with zeros.
Rev. D | Page 56 of 64
READBACK OF ALARM STATUS REGISTER
The alarm status register is a read-only register that provides
information about temperature, clamp, and guard alarm events
(see Table 34). Temperature alarm status is also available in any
of the four PMU readback registers.