ADF7021-VBCPZ-RL Analog Devices Inc, ADF7021-VBCPZ-RL Datasheet - Page 32
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ADF7021-VBCPZ-RL
Manufacturer Part Number
ADF7021-VBCPZ-RL
Description
Narrow Band Transceiver 433/868/900 MHz
Manufacturer
Analog Devices Inc
Datasheet
1.EVAL-ADF7021-VDB2Z.pdf
(60 pages)
Specifications of ADF7021-VBCPZ-RL
Frequency
80MHz ~ 960MHz
Data Rate - Maximum
24 kbps
Modulation Or Protocol
FSK
Applications
ISM
Power - Output
13dBm
Sensitivity
-125dBm
Voltage - Supply
2.3 V ~ 3.6 V
Current - Receiving
21.7mA
Current - Transmitting
27.1mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
48-VFQFN, CSP Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
ADF7021-V
RECEIVER SETUP
Correlator Demodulator Setup
To enable the correlator for various modulation modes, see
Table 15.
Table 15. Enabling the Correlator Demodulator
Received Modulation
2FSK
3FSK
4FSK
To optimize receiver sensitivity, the correlator bandwidth must
be optimized for the specific deviation frequency and modula-
tion used by the transmitter. The discriminator bandwidth is
controlled by Register 4, Bits[DB19:DB10], and is defined as
where:
DEMOD CLK is as defined in the Register 3—Transmit/Receive
Clock Register section.
K is set for each modulation mode as follows:
For 2FSK,
For 3FSK,
For 4FSK,
where:
Round is rounded to the nearest integer.
Round
32, 31, 28, 27, 24, 23, 20, 19, 16, 15, 12, 11, 8, 7, 4, 3.
f
is the frequency deviation used for the ±1 symbols (that is, the
inner frequency deviations).
To optimize the coefficients of the correlator, Register 4, Bit DB7
and Register 4, Bits[DB9:DB8] must also be assigned. The value
of these bits depends on whether K is odd or even. These bits
are assigned according to Table 16 and Table 17.
Table 16. Assignment of Correlator K Value for 2FSK and 3FSK
K
Even
Even
Odd
Odd
DEV
is the transmit frequency deviation in Hz. For 4FSK, f
DISCRIMINA
K
K
K
4FSK
=
=
=
Round
Round
Round
is rounded to the nearest of the following integers:
K/2
Even
Odd
N/A
N/A
4FSK
⎛
⎜
⎜
⎝
⎛
⎜
⎜
⎝
100
100
2
TOR
×
⎛
⎜
⎜
⎝
f
×
×
100
f
DEV
4
(K + 1)/2
N/A
N/A
Even
Odd
DEV
10
10
×
_
BW
×
3
3
f
DEV
10
⎞
⎟
⎟
⎠
⎞
⎟
⎟
⎠
DEMOD_SCHEME
(Register 4, Bits[DB6:DB4])
001
010
011
3
=
⎞
⎟
⎟
⎠
(
DEMOD
0
1
1
Register 4,
Bit DB7
0
400
×
CLK
10
3
×
Register 4,
Bits[DB9:DB8]
00
10
00
10
K
)
DEV
Rev. 0 | Page 32 of 60
Table 17. Assignment of Correlator K Value for 4FSK
K
Even
Odd
Linear Demodulator Setup
The linear demodulator can be used for 2FSK demodulation. To
enable the linear demodulator, set the DEMOD_SCHEME bits
(Register 4, Bits[DB6:DB4]) to 000.
Postdemodulator Filter Setup
The 3 dB bandwidth of the postdemodulator filter should be
set according to the received modulation type and data rate.
The bandwidth is controlled by Register 4, Bits[DB29:DB20]
and is given by
where f
demodulator filter.
Table 18. Postdemodulator Filter Bandwidth Settings for
2FSK/3FSK/4FSK Modulation Schemes
Received
Modulation
2FSK
3FSK
4FSK
3FSK Viterbi Detector Setup
The Viterbi detector can be used for 3FSK data detection; it is
activated by setting Register 13, Bit DB11, to Logic 1.
The Viterbi path memory length is programmable in steps of
4, 6, 8, or 32 bits (VITERBI_PATH_MEMORY, Register 13,
Bits[DB14:DB13]). The path memory length should be set
equal to or greater than the maximum number of consecutive
0s in the interleaved transmit bit stream.
The Viterbi detector also uses threshold levels to implement the
maximum likelihood detection algorithm. These thresholds are
programmable via the 3FSK/4FSK_SLICER_THRESHOLD bits
(Register 13, Bits[DB10:DB4]).
These bits are assigned as follows:
3FSK/4FSK_SLICER_THRESHOLD =
where K is the value calculated for correlator discriminator
bandwidth.
3FSK Threshold Detector Setup
To activate threshold detection of 3FSK, Register 13, Bit DB11,
should be set to Logic 0. The 3FSK/4FSK_SLICER_THRESHOLD
bits (Register 13, Bits[DB10:DB4]) should be set as described in
the 3FSK Viterbi Detector Setup section.
POST
7 5
CUTOFF
×
⎛
⎜
⎜
⎝
Tx
_
is the target 3 dB bandwidth in Hz of the post-
DEMOD
Register 4, Bit DB7
0
1
_
FREQUENCY
Postdemodulator Filter Bandwidth,
f
0.75 × data rate
1 × data rate
1.6 × symbol rate (0.8 × data rate)
_
CUTOFF
BW
100
(Hz)
=
×
_
2
10
DEMOD
DEVIATION
11
3
×
π
Register 4, Bits[DB9:DB8]
00
00
×
f
CUTOFF
CLK
×
K
⎞
⎟
⎟
⎠