CS8416-DZZR Cirrus Logic Inc, CS8416-DZZR Datasheet - Page 14

• Manufacturer Part Number: CS8416-DZZR
• Description: IC,Digital Audio Receiver,CMOS,TSSOP,28PIN,PLASTIC
• Manufacturer: Cirrus Logic Inc

14
2.2
Name
DGND
AGND
RST
FILT
Pin
VD
VA
VL
QFN Pin Description
Pin #
20
18
19
3
4
6
5
Analog Power (Input) - Analog power supply. Nominally +3.3 V. This supply should have as little noise
as possible since noise on this pin will directly affect the jitter performance of the recovered clock
Digital Power (Input) – Digital core power supply. Nominally +3.3 V
Logic Power (Input) – Input/Output power supply. Nominally +3.3 V or +5.0 V
Analog Ground (Input) - Ground for the analog circuitry in the chip. AGND and DGND should be con-
nected to a common ground area under the chip.
Digital & I/O Ground (Input) - Ground for the I/O and core logic. AGND and DGND should be connected
to a common ground area under the chip.
Reset (Input) - When RST is low, the CS8416 enters a low power mode and all internal states are reset.
On initial power up, RST must be held low until the power supply is stable, and all input clocks are stable
in frequency and phase.
PLL Loop Filter (Output) - An RC network should be connected between this pin and analog ground.
For minimum PLL jitter, return the ground end of the filter network directly to AGND. See
page 53
AGND
RXP0
RXP4
for more information on the PLL and the external components.
RXN
FILT
RST
VA
1
2
3
4
5
6
7
28
8
27
9
28-pin QFN Package
10
26
Top-Down View
Thermal Pad
11
25
Pin Description
12
24
13
23
14
22
21
20
19
18
17
16
15
RMCK
VD
DGND
VL
GPO0
GPO1
AD2 / GPO2
“PLL Filter” on
CS8416
DS578F3