CS8416-DZZR Cirrus Logic Inc, CS8416-DZZR Datasheet - Page 39

• Manufacturer Part Number: CS8416-DZZR
• Description: IC,Digital Audio Receiver,CMOS,TSSOP,28PIN,PLASTIC
• Manufacturer: Cirrus Logic Inc

DS578F3
14.5
14.6
GPO1SEL3
RUN
7
7
Control3 (03h)
GPO1SEL[3:0] – GPO1 Source select. See
Default = ‘0000’
GPO2SEL[3:0] – GPO2 Source select. See
Default = ‘0000’
Control4 (04h)
RUN - Controls the internal clocks, allowing the CS8416 to be placed in a “powered down”, low current con-
sumption state.
Default = ‘0’
0 - Internal clocks are stopped. Internal state machines are reset. The fully static control port is
operational, allowing registers to be read or changed. Power consumption is low.
1 - Normal part operation. This bit must be written to the 1 state to allow the CS8416 to begin operation. All
input clocks should be stable in frequency and phase when RUN is set to 1.
RXD – RMCK Control
Default = ‘0’
0 -RMCK is an output, Clock is derived from input frame rate.
1 – RMCK becomes high impedance. The output of OSCLK, OLRCK, and SDOUT are indeterminate.
RX_SEL[2:0] – Selects RXP0 to RXP7 for input to the receiver
Default =’000’
000 – RXP0
001 – RXP1, etc
GPO1SEL2
RXD
6
6
-10
Gain,
dB
0
GPO1SEL1
RXSEL2
5
Figure 14. De-Emphasis Filter Response
5
3.183
F1
T1 =
50us
GPO1SEL0
RXSEL1
4
4
10.61
“General Purpose Outputs” on page
“General Purpose Outputs” on page
F2
T2
=15us
GPO2SEL3
RXSEL0
3
3
GPO2SEL2
TXSEL2
2
2
Frequency,
KHz
GPO2SEL1
TXSEL1
29.
29.
1
1
GPO2SEL0
CS8416
TXSEL0
0
0
39