DSPIC30F2010-20E/MM Microchip Technology, DSPIC30F2010-20E/MM Datasheet - Page 43

• Manufacturer Part Number: DSPIC30F2010-20E/MM
• Description: IC,DSP,16-BIT,CMOS,LLCC,28PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F2010-20E/MM

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 20
• Program Memory Size: 12KB (4K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 28-QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

6.0
The dsPIC30F family of devices contains internal
program Flash memory for executing user code. There
are two methods by which the user can program this
memory:
1.
2.
6.1
dsPIC30F devices can be serially programmed while in
the end application circuit. This is simply done with two
lines for Programming Clock and Programming Data
(which are named PGC and PGD respectively), and
three other lines for Power (V
FIGURE 6-1:
© 2011 Microchip Technology Inc.
Note:
In-Circuit Serial Programming (ICSP™)
programming capability
Run-Time Self-Programming (RTSP)
FLASH PROGRAM MEMORY
In-Circuit Serial Programming
(ICSP)
This data sheet summarizes features of
this group of dsPIC30F devices and is not
intended to be a complete reference
source. For more information on the CPU,
peripherals, register descriptions and
general device functionality, refer to the
“dsPIC30F Family Reference Manual”
(DS70046). For more information on the
device instruction set and programming,
refer to the “16-bit MCU and DSC Pro-
grammer’s
(DS70157).
User/Configuration
Space Select
ADDRESSING FOR TABLE AND NVM REGISTERS
Reference
DD
Using
NVMADR
Addressing
Using
Table
Instruction
), Ground (V
Using
Program
Counter
1/0
1/0
Manual”
0
SS
) and
TBLPAG Reg
NVMADRU Reg
8 bits
8 bits
Program Counter
Master Clear (MCLR). This allows customers to manu-
facture boards with unprogrammed devices, and then
program the digital signal controller just before shipping
the product. This also allows the most recent firmware
or a custom firmware to be programmed.
6.2
RTSP is accomplished using TBLRD (table read) and
TBLWT (table write) instructions.
With RTSP, the user may erase program memory, 32
instructions (96 bytes) at a time and can write program
memory data, 32 instructions (96 bytes) at a time.
6.3
The TBLRDL and the TBLWTL instructions are used to
read or write to bits<15:0> of program memory.
TBLRDL and TBLWTL can access program memory in
Word or Byte mode.
The TBLRDH and TBLWTH instructions are used to read
or write to bits<23:16> of program memory. TBLRDH
and TBLWTH can access program memory in Word or
Byte mode.
A 24-bit program memory address is formed using
bits<7:0> of the TBLPAG register and the EA from a W
register specified in the table instruction, as shown in
Figure
24 bits
24-bit EA
6-1.
NVMADR Reg EA
Working Reg EA
Run-Time Self-Programming
(RTSP)
Table Instruction Operation Summary
16 bits
16 bits
dsPIC30F2010
0
Byte
Select
DS70118J-page 43