LTC4253AIUF-ADJ Linear Technology, LTC4253AIUF-ADJ Datasheet - Page 15

• Manufacturer Part Number: LTC4253AIUF-ADJ
• Description: IC,Power Control/Management,CMOS,LLCC,20PIN,PLASTIC
• Manufacturer: Linear Technology

Specifications of LTC4253AIUF-ADJ

• Family Name: LTC4253A-ADJ
• Package Type: QFN EP
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Product Depth (mm): 4mm
• Product Length (mm): 4mm
• Mounting: Surface Mount
• Pin Count: 20
• Lead Free Status / Rohs Status: Not Compliant

APPLICATIO S I FOR ATIO
Figure 2b shows the implementation of the overvoltage
function of the Typical Application. During UVLO, OVD is
forced high so OVL is multiplexed to OVIN. At time point
1, the part exits UVLO and the overvoltage comparator is
enabled. OVIN = OVL is less than V
goes low, switching OV to OVIN and bringing the part to
Normal mode. At time point 2, OV ramps past V
(5.09V) and OVD goes high, switching OVL to OVIN as well
as turning on the internal 10mV hysteresis as the part goes
into overvoltage. OVL is tied to OVIN until time point 3
when OVL ramps past V
OVD goes low, bringing the part into Normal mode and
switching OV to OVIN.
The undervoltage (UV) comparator has no internal hyster-
esis to preserve the accuracy of the hysteresis set across
UVL/UV while the overvoltage (OV) comparator has an
internal low to high hysteresis of 10mV. This will add to the
hysteresis set across OVL/OV and provide some noise
immunity if OVL/OV is shorted together. Any implementa-
tion must ensure that V
conditions.
The various thresholds to note are:
Using these thresholds and an external resistive divider,
any required supply operating range can be implemented.
An example is shown in Figure 1 where the required typical
operating range is:
A quick check of the resistive divider ratios required at
UVL, UV, OVL and OV confirms that UVL is tapped
between R5/R4, UV is tapped between R4/R3, OVL is
tapped between R3/R2 and OV is tapped between R2/R1.
UV low-to-high (V
UVL high-to-low (V
OV low-to-high (V
OVL high-to-low (V
Undervoltage low-to-high (V
Undervoltage high-to-low (V
Overvoltage low-to-high (V
Overvoltage high-to-low (V
U
UVHI
OVHI
UVLO
OVLO
UVL
OVLO
) = 3.08V
) = 5.09V
U
≥ V
) = 3.08V
) = 5.08V
(5.09V – 10mV = 5.08V) and
UV
48OVHI
48OVLO
48UVHI
48UVLO
and V
OVLO
W
) = 82V
) = 78V
) = 43V
) = 39V
OVL
(5.08V) so OVD
≥ V
OV
U
under all
OVHI
From Figure 1, by looking at the voltages at OV, OVL, UV
and UVL, the following equations are obtained:
Starting with a value of 20k for R1, Equation 1b gives R2
= 0.984k (use closest 1% standard value of 0.976k). Using
R1 = 20k and R2 = 0.976k, Equation 1c gives R3 = 2.103k
(use the closest 1% standard value of 2.1k). Using R1 =
20k, R2 = 0.976k and R3 = 2.1k, Equation 1d gives R4 =
2.37k (use closest 1% standard value of 2.37k). Using R1
= 20k, R2 = 0.976k, R3 = 2.1k and R4 = 2.37k in Equation
1a, R5 = 296.754k (use 1% standard values of 294k in
series with 2.74k).
The divider values shown set a standing current of slightly
more than 150µA and define an impedance at UVL/UV/
OVL/OV of approximately 20k. This impedance will work
with the hysteresis set across UVL/UV and OVL/OV to
provide noise immunity to the UV and OV comparators. If
R
R
R
R
R
R
where
R
R
R
R
2
3
TOTAL
TOTAL
4
1
1
1
TOTAL
TOTAL
R
R
+
+
+
=
=
=
1
TOTAL
R
R
R
R
R
R
R
:
2
2
2
1
1
1
TOTAL
⎛
⎜
⎝
=
=
⎛
⎜
⎝
⎛
⎜
⎝
+
+
=
=
V
V
V
(
R
R
R
V
V
V
R
48
V
V
48
48
1
3
UVHI
3
V
OVLO
UVLO
V
48
48
1
UVHI
UVLO
OVLO
OVHI
•
OVLO
+
V
+
=
OVHI
OVLO
V
OVHI
R
R
48
V
4
2
V
48
OVHI
•
UVHI
•
•
+
=
UVHI
V
V
V
R
V
48
V
V
V
48
48
OVHI
3
V
LTC4253A-ADJ
OVHI
48
OVHI
OVHI
UVLO
OVHI
OVHI
+
UVLO
R
4
⎞
⎟
⎠
⎞
⎟
⎠
⎞
⎟
⎠
+
–
–
–
R
R
R
R
5
1
1
1
)
–
–
R
R
2
2
–
R
3
15
4253a-adjf
(1b)
(1d)
(1a)
(1c)