ispPAC-CLK5316S-01TN64I Lattice, ispPAC-CLK5316S-01TN64I Datasheet - Page 27

• Manufacturer Part Number: ispPAC-CLK5316S-01TN64I
• Description: Clock Drivers & Distribution ISP 0 Delay Unv Fan- Out Buf-Sngl End I
• Manufacturer: Lattice

Specifications of ispPAC-CLK5316S-01TN64I

• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Maximum Operating Temperature: 85 C
• Package / Case: TQFP-64
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
Figure 22. ispClock5300S configured as Zero Delay Buffer Mode
Mixed Zero Delay and Non-Zero Delay Buffer Mode
Figure 23 shows the operation of the ispClock5300S in Mixed Zero Delay and Non Zero Delay modes. In this mode
the output switch matrix is configured to route non selected reference clock, selected reference clock, and the zero
delay clock through the PLL.
The skew control mechanism is available only to clocks sourced from the PLL.
Single Ended /
Clock Input
Differential
ispClock5300S
Internal Feedback
PLL
27
V1
V2
V3
External Feedback
ispClock5300S Family Data Sheet