LX128V-32FN208C Lattice, LX128V-32FN208C Datasheet - Page 34
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LX128V-32FN208C
Manufacturer Part Number
LX128V-32FN208C
Description
Analog & Digital Crosspoint ICs 128 I/O Switch Matrix, 3.3V, SERDES, 3.2ns, Pb-Free
Manufacturer
Lattice
Datasheet
1.LX256EV-5FN484C.pdf
(75 pages)
Specifications of LX128V-32FN208C
Maximum Dual Supply Voltage
3.6 V
Minimum Dual Supply Voltage
3 V
Mounting Style
SMD/SMT
Number Of Arrays
1
Operating Supply Voltage
3.3 V
Supply Type
Triple
Configuration
128 x 128
Package / Case
FPBGA-208
Data Rate
21 Gbps
Input Level
Bus LVDS, LVCMOS, LVDS, LVPECL, LVTTL
Output Level
Bus LVDS, LVCMOS, LVDS, LVPECL, LVTTL
Maximum Operating Temperature
+ 90 C
Minimum Operating Temperature
0 C
Product
Digital Crosspoint
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LX128V-32FN208C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
Lattice Semiconductor
Figure 21. ispGDX2 Timing Model Diagram (in FIFO Only Mode)
(Global RESET)
from I/O Cell
from I/O Cell
(I/O RESET)
from I/O Cell
from I/O Cell
from I/O Cell
from I/O Cell
from I/O Cell
(WCLK)
(RCLK)
(DIN)
(WE)
(RE)
t
t
t
FIFODATAIN
t
HSIFIFORST
t
t
FIFOWCLK
FIFORCLK
FIFOWEN
FIFOREN
Data In
Write
Clock
Write
Enable
Read
Clock
Read
Enable
31
RESET
FIFO
FULL, EMPTY
FIFO Flags
Data Out
ispGDX2 Family Data Sheet
(Output Path Flags)
to I/O Cell
(DOUT)
to I/O Cell