AT84CS001VTPY E2V, AT84CS001VTPY Datasheet - Page 5

• Manufacturer Part Number: AT84CS001VTPY
• Description: Demultiplexer 240-Pin EBGA
• Manufacturer: E2V

Specifications of AT84CS001VTPY

• Package: 240EBGA
• Power Supply Type: Analog|Digital
• Typical Supply Current: 600 mA
• Typical Operating Supply Voltage: 3.3 V
• Minimum Operating Supply Voltage: 2.375|3.15 V
• Maximum Operating Supply Voltage: 2.625|3.45 V

3.1
e2v semiconductors SAS 2009
Control Signal Settings
Figure 3-1.
The ASYNCRST, SLEEP, DAEN, STAGG, BIST, RS, CLKTYPE and DRTYPE control signals use the
same static input buffer.
ASYNCRST is activated on logic HIGH (tied/switched to V
ing), and deactivated on logic LOW (grounded).
SLEEP, DAEN, STAGG, BIST are activated on logic LOW (10Ω grounded), and deactivated on logic
HIGH (10 kΩ to ground, or tied to V
Figure 3-2.
10Ω
Device Pinout
Control Signal Settings
Active Low Level ('0')
GND
CLKDACTRL
ASYNCRST
CLK, CLKN
[I0N…I9N]
DAI, DAIN
CLKTYPE
DRTYPE
DACTRL
STAGG
[I0…I9]
SLEEP
DAEN
BIST
Signal Pin
RS
Control
20
2
2
CCD
= 3.3V, or left floating).
VCCD
10 KΩ
AT84CS001
GND
GND
VPLUSD
Signal Pin
Control
CCD
= 3.3V, or 10 kΩ to ground, or left float-
Inactive High Level ('1')
20
20
20
20
2
2
2
2
2
Connected
2
Not
[A0…A9]
[A0N…A9N]
AOR/DRAN
AORN/DRA
[B0…B9]
[B0N…B9N]
BOR/DRBN
BORN/DRB
[C0…C9]
[C0N…C9N]
COR/DRCN
CORN/DRC
[D0…D9]
[D0N…D9N]
DOR/DRDN
DORN/DRD
DAO, DAON
DR, DRN
0809E–BDC–05/09
Signal Pin
Control
AT84CS001
5