MT47H64M8CF-25E IT:G Micron Technology Inc, MT47H64M8CF-25E IT:G Datasheet - Page 73

• Manufacturer Part Number: MT47H64M8CF-25E IT:G
• Description: 64MX8 DDR2 SDRAM PLASTIC IND TEMP FBGA 1.8V
• Manufacturer: Micron Technology Inc

Burst Length
Figure 33: MR Definition
PDF: 09005aef8440dbbc
512mbddr2_ait_aat.pdf – Rev. C 7/11 EN
Notes:
Burst length is defined by bits M0–M2, as shown in Figure 33. Read and write accesses
to the DDR2 SDRAM are burst-oriented, with the burst length being programmable to
either four or eight. The burst length determines the maximum number of column loca-
tions that can be accessed for a given READ or WRITE command.
When a READ or WRITE command is issued, a block of columns equal to the burst
length is effectively selected. All accesses for that burst take place within this block,
meaning that the burst will wrap within the block if a boundary is reached. The block is
uniquely selected by A2–Ai when BL = 4 and by A3–Ai when BL = 8 (where Ai is the most
significant column address bit for a given configuration). The remaining (least signifi-
cant) address bit(s) is (are) used to select the starting location within the block. The pro-
grammed burst length applies to both read and write bursts.
0
BA2
16
M15
1. M16 (BA2) is only applicable for densities 1Gb, reserved for future use, and must be
2. Mode bits (Mn) with corresponding address balls (An) greater than M12 (A12) are re-
3. Not all listed WR and CL options are supported in any individual speed grade.
1
0
0
1
1
BA1
15
MR
M14
programmed to “0.”
served for future use and must be programmed to “0.”
14
BA0
M12
0
1
0
1
0
1
0
M11
n
An
Extended mode register (EMR2)
Extended mode register (EMR3)
0
0
0
0
1
1
1
1
Extended mode register (EMR)
(low power)
PD Mode
Slow exit
2
PD
(normal)
Fast exit
Mode Register Definition
12
A12 A11
M10
0
0
1
1
0
0
1
1
Micron Confidential and Proprietary
Mode register (MR)
11
M9
0
1
0
1
0
1
0
1
WR
10
A10
Write Recovery
9
Reserved
A9
DLL TM
M8
0
1
2
3
4
5
6
7
8
8
A8
DLL Reset
M7
0
1
7
A7 A6 A5 A4 A3
Yes
No
CAS#
Normal
Mode
6
Test
Latency
5
M6
73
0
0
0
0
1
1
1
1
512Mb: x8, x16 Automotive DDR2 SDRAM
4
M5
BT
0
0
1
1
0
0
1
1
3
M3
0
1
M4
Burst Length
M2
0
1
0
1
0
1
0
1
0
0
0
0
1
1
1
1
2
A2 A1 A0
M1
0
0
1
1
0
0
1
1
1
M0
0
1
0
1
0
1
0
1
Burst Type
Interleaved
CAS Latency (CL)
Micron Technology, Inc. reserves the right to change products or specifications without notice.
Sequential
0
Burst Length
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
3
4
5
6
7
Address Bus
Mode Register (Mx)
4
8
Mode Register (MR)
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