TDA18271HD/C2-T NXP Semiconductors, TDA18271HD/C2-T Datasheet - Page 27

• Manufacturer Part Number: TDA18271HD/C2-T
• Description: Tuners HYBRIDE
• Manufacturer: NXP Semiconductors

Specifications of TDA18271HD/C2-T

• Bus Type: I2C
• Maximum Agc: 71 dB
• Maximum Frequency: 864 MHz
• Minimum Frequency: 45 MHz
• Mounting Style: SMD/SMT
• Package / Case: HLQFN-64
• Function: TV
• Noise Figure: 5.5 dB
• Operating Supply Voltage: 3.3 V
• Supply Voltage (min): 3.13 V
• Supply Voltage (max): 3.47 V
• Minimum Operating Temperature: 0 C
• Maximum Operating Temperature: + 70 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: TDA18271HD/C2,518

NXP Semiconductors
TDA18271HD_4
Product data sheet
Fig 9.
TDA18271FixedContentsI2Cupdate
Internal table update with
correct values
Tuner registers update
AGC1 gain setup
Flowchart TDA18271FixedContentsI2Cupdate
Actions
Start
9.4.5 Flowchart TDA18271CalcRFFilterCurve
Internal table
TM = 08h
PL = 80h
EP1 = C6h
EP2 = DFh
EP3 = 16h
EP4 = 60h
EP5 = 80h
CPD = 80h
CD1 = 00h
CD2 = 00h
CD3 = 00h
MPD = 00h
MD1 = 00h
MD2 = 00h
MD3 = 00h
EB1 = FCh
EB2 = 01h
EB3 = 84h
EB4 = 41h
EB5 = 01h
EB6 = 84h
EB7 = 40h
EB8 = 07h
EB9 = 00h
EB10 = 00h
EB11 = 96h
EB12 = 33h
EB13 = C1h
EB14 = 00h
EB15 = 8Fh
EB16 = 00h
EB17 = 00h
EB18 = 8Ch
EB19 = 00h
EB20 = 20h
EB21 = B3h
EB22 = 48h
EB23 = B0h
-
EB17 = 00h
EB17 = 03h
EB17 = 43h
EB17 = 4Ch
Table 30.
Function
Description
Input
Table
Output
I
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
TM...EB23
EB17
EB17
EB17
EB17
2
C-bus
MS
TDA18271CalcRFFilterCurve
Description
calculate the RF filter curve coefficients
RF1_default, RF2_default, RF3_default, MS
RF_BAND_map
TMVALUE_RFCAL
IRCAL low band
initialization
Tuner registers update
MAIN PLL CP source on
Wait 1 ms
MAIN PLL CP source off
Wait 5 ms - PLL locking
Launch detector
Wait 5 ms - measurement
CAL PLL update
Tuner registers update
Wait 5 ms - PLL locking
Launch optimization algorithm
Wait 30 ms - optimization
IRCAL mid band
initialization
Tuner registers update
Wait 5 ms - PLL locking
Launch detector
Wait 5 ms - measurement
CAL PLL update
Tuner registers update
Wait 5 ms - PLL locking
Launch optimization algorithm
Wait 30 ms - optimization
Rev. 04 — 19 May 2009
EP3 = 1Fh
EP4 = 66h
EP5 = 81h
CPD = CCh
CD1 = 6Ch
CD2 = 00h
CD3 = 00h
MPD = CDh
MD1 = 77h
MD2 = 08h
MD3 = 00h
-
EB4 = 61h
EB4 = 41h
-
EP5 = 85h
CPD = CBh
CD1 = 66h
CD2 = 70h
EP5 = 82h
CPD = A8h
CD2 = 00h
MPD = A9h
MD1 = 73h
MD2 = 1Ah
-
-
EP5 = 86h
CPD = A8h
CD1 = 66h
CD2 = A0h
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
EP3...MD3
EB4
EB4
EP1
-
-
-
-
EP3...CD3
EP2
-
-
-
-
-
-
EP3...MD3
EP1
-
-
-
-
EP3...CD3
EP2
IRCAL high band
initialization
Tuner registers update
Wait 5 ms - PLL locking
Launch detector
Wait 5 ms - measurement
CAL PLL update
Tuner registers update
Wait 5 ms - PLL locking
Launch optimization algorithm
Wait 30 ms - optimization
Back to normal mode
Synchronization
TDA18271FixedContentsI2Cupdate
Reference
Table 45 “RF_BAND_map”
TDA18271HD
End
© NXP B.V. 2009. All rights reserved.
EP5 = 83h
CPD = 98h
CD1 = 65h
CD2 = 00h
MPD = 99h
MD1 = 71h
MD2 = CDh
-
-
EP5 = 87h
CD1 = 65h
CD2 = 50h
-
-
EP4 = 64h
-
Silicon Tuner IC
-
-
-
-
-
-
-
EP3...MD3
EP1
-
-
-
EP3...CD3
EP2
EP4
EP1
001aah045
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