STLC5466 STMicroelectronics, STLC5466 Datasheet - Page 11

• Manufacturer Part Number: STLC5466
• Description: RF Wireless Misc Multi-HDLC Sw Matrix
• Manufacturer: STMicroelectronics
• Type: Telecom ICr

Specifications of STLC5466

• Operating Temperature Range: - 40 C to + 85 C
• Package / Case: LQFP-176
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

MEMORY INTERFACE
Pin N°
Type
TTL
TTL
TTL
TTL
CMOS
CMOS
112
113
114
115
116
119
120
121
122
123
124
125
126
127
129
137
138
139
140
141
142
143
144
145
146
149
150
151
152
154
155
156
157
158
161
ft: five volts tolerant
I1_ft = Input TTL
I/O6 _ft = Input TTL/ Output TTL 6 mA
O3 _ft = Output TTL 3 mA O3T_ft = O3_ft+Tristate
O6D_ft = Output TTL 6mA, Open Drain
I/O8_fnt = Input TTL, /Output CMOS 8mA;
O4_fnt = Output CMOS 4mA
NCE3/ADM13
Symbol
SCANM
ADM12
ADM10
ADM11
UDQM
LDQM
NCE2/
NRAS
ADM0
ADM1
ADM2
ADM3
ADM4
ADM5
ADM6
ADM7
ADM8
ADM9
NCAS
NCE0
NCE1
NWE
TRO
DM0
DM1
DM2
DM3
DM4
DM5
D11
D12
D13
D14
D15
TRI
O8T_fnt Write Enable for SDRAM
O8T_fnt Row Address Strobe for SDRAM
O8T_fnt Chip Select 0 for SDRAM
O8T_fnt Lower Data inputs/outputs mask enable for SDRAM
O8T_fnt Chip Select 1 for SDRAM
O8T_fnt Upper Data inputs/outputs mask enable for SDRAM
O8T_fnt Chip Select 2 for SDRAM/
O8T_fnt Chip Select 3 for SDRAM/Address bit 13 for 8Mx8 SDRAM circuit
O8T_fnt Address bit 0 for SDRAM
O8T_fnt Address bit 1 for SDRAM
O8T_fnt Address bit 2 for SDRAM
O8T_fnt Address bit 3 for SDRAM
O8T_fnt Address bit 4 for SDRAM
O8T_fnt Address bit 5 for SDRAM
O8T_fnt Address bit 6 for SDRAM
O8T_fnt Address bit 7 for SDRAM
O8T_fnt Address bit 8 for SDRAM
O8T_fnt Address bit 9 for SDRAM
O8T_fnt Address bit 10 for SDRAM
O8T_fnt Address bit 11 for SDRAM
O8T_fnt Column Address Strobe for SDRAM
I/O8_fnt SDRAM Data bit 0
I/O8_fnt SDRAM Data bit 1
I/O8_fnt SDRAM Data bit 2
I/O8_fnt SDRAM Data bit 3
I/O8_fnt SDRAM Data bit 4
I/O8_fnt SDRAM Data bit 5
I/O6_ft
I/O6_ft
I/O6_ft
I/O6_ft
I/O6_ft
O4_fnt
Type
I3_ft
I5_ft
fnt: five volts not tolerant
I2_ft = I1_ft+pull up
Data bit 11 for P if not multiplexed
Data bit 12 for P if not multiplexed
Data bit 13 for P if not multiplexed
Data bit 14 for P if not multiplexed
Data bit 15 for P if not multiplexed
Token Ring Input (for use Multi-HDLC s in cascade)
Token Ring Output (for use Multi-HDLC s in cascade)
Address bit 12 for 8Mx8 SDRAM circuit
Scan mode reserved for device test
I3_ft = I1_ft+hysteresis
O6_ft = Output TTL 6mA
O6DT_ft = Output TTL 6mA, Open Drain or Tristate
O8T_fnt = Output CMOS
8mA
Function
I4_ft = I3_ft+pull up
I5_ft = I3_ft+pull down;
I/O8_fnt = Input TTL, /Output CMOS
8mA
STLC5466
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