STLC5466 STMicroelectronics, STLC5466 Datasheet - Page 44

• Manufacturer Part Number: STLC5466
• Description: RF Wireless Misc Multi-HDLC Sw Matrix
• Manufacturer: STMicroelectronics
• Type: Telecom ICr

Specifications of STLC5466

• Operating Temperature Range: - 40 C to + 85 C
• Package / Case: LQFP-176
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

STLC5466
ACCESS MODE REGISTER (AMR)
READ : READ MEMORY
CM
BID
CAC
• N.B. After software reset (bit 2 of IDCR Register) or pin reset an automate is working to reset the con-
CACL : CYCLICAL ACCESS LIMITED
TC
44/130
nection memory (all “0”). The automate is stopped when the microprocessor writes TAAR Register with
CAC= 0.
: CONNECTION MEMORY
: BIDIRECTIONNAL CONNECTION.
: CYCLICAL ACCESS
: Transparent Connection
READ = 1, Read Connection Memory (or Data Memory in accordance with CM).
READ = 0, Write Connection Memory.
CM = 1, Write or Read Connection Memory in accordance with READ.
CM = 0, Read only Data Memory (READ = 0 has no effect).
N.B. After software reset (bit 2 of IDCR Register) or pin reset the automate of the Connection
Memory is launched. This automate initializes the Connection Memory within 250 microsec-
onds at the most. This automate is stopped when the microprocessor writes (0200H) in CMAR
Register (CM =1).
BID = 1; Two connections are set up:
• ITSx ITDMp ------> OTSy OTDMq (LOOP of CMDR Register is taken into account) and
• ITSy ITDMq ------> OTSx OTDMp (LOOP of CMDR Register is not taken into account).
BID = 0; One connection is set up:
• ITSx ITDMp ------> OTSy OTDMq only.
CAC = 1 (BID is ignored)
if Write Connection Memory, an automatic data write from Connection Memory Data Register
(CMDR) up to 256 locations of Connection Memory occurs. The first address is indicated by the
register DSTR, the last is (FF)H.
if Read Connection Memory, an automatic transfer of data from the location indicated by the
register (DSTR) into Connection Memory Data Register (CMDR) after reading by the micro-
processor occurs. The last location is (FF)H.
CAC = 0, Write and Read Connection Memory in the normal way.
CACL = 1(BID is ignored)
If Write Connection Memory, an automatic data write from Connection Memory Data Register
(CMDR) up to 32 locations of Connection Memory occurs. The first location is indicated by OTS
0/4bits of the register (DSTR) related to OTDMq as defined by OM0/2 occurs. The last location
is q +1 F(H).
If Read Connection Memory, an automatic transfer of data from Connection Memory into Con-
nection Memory Data Register (CMDR) after reading this last by the microprocessor oc-
curs.The first location is indicated by OTS 0/4 bits of the register (DSTR) related to OTDMq as
defined by OM0/2. The last location is q +1 F(H).
CACL = 0, Write and Read Connection Memory in the normal way.
TC = 1, (BID is ignored) if READ = 0:
CAC = 0 and CACL = 0. The DSTR bits are taken into account instead of SRCR bits. SRCR
bits are ignored (Destination and Source are identical). The contents of Input time slot i - Input
multiplex j is switched into Output time slot i - Output multiplex j.
CAC = 0 and CACL = 1. Up to 32 “Transparent Connections” are set up.
CAC = 1 and CACL = 0. Up to 256 “Transparent Connections” are set up.
TC = 0, Write and Read Connection Memory in accordance with BID.