FW82371EB Intel, FW82371EB Datasheet - Page 41

• Manufacturer Part Number: FW82371EB
• Manufacturer: Intel

Specifications of FW82371EB

• Lead Free Status / RoHS Status: Not Compliant

Documentation Changes
1.
2.
3.
4.
Specification Update
R
PCI Revision ID (RID) Register Values
Change
Status: Not updated in Datasheet. This is the standard reference document.
Interval Timer for IRQ0
Section 8.6 and Figure 5 in the Datasheet incorrectly refer to Interval Timer 1 as the timer used by IRQ0
for the system timer interrupt. IRQ0 is actually tied to Interval Timer 0.
This change applies to all steppings of the PIIX4 and will be incorporated into the next revision of the
PIIX4 datasheet.
PCI Bus Master Activity for Burst Events
Section 11.2.1 in the Datasheet incorrectly lists PCI Bus Master Activity [BRLD_EN_BM] as a fast
burst event. The BRLD_EN_BM bit is not supported.
This change applies to all steppings of the PIIX4 and will be incorporated into the next revision of the
PIIX4 datasheet.
IRQ9 and IRQ9OUT# Pin Locations
Table 55 and Figure 34 incorrectly document the pin locations for IRQ9 and IRQ9OUT/GPO29. Pin F3
should be documented as IRQ9OUT#/GPO29 and pin U1 should be documented as IRQ9.
This change applies to all steppings of the PIIX4 and will be incorporated into the next revision of the
PIIX4 datasheet.
Function
:
The RID register (PCI offset 08h) values for functions 0, 1, 2, and 3 are shown below:
0
1
2
3
PIIX4 A-0
00h
00h
00h
00h
PIIX4 A-1
00h
00h
00h
00h
Stepping
PIIX4 B-0
01h
01h
01h
01h
Intel
PIIX4E A-0
®
02h
01h
01h
02h
82371EB (PIIX4E)
41